Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mp-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale IMX8MP IOMUX Controller

maintainers:
  - Anson Huang <Anson.Huang@nxp.com>

description:
  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
  for common binding part and usage.

properties:
  compatible:
    const: fsl,imx8mp-iomuxc

  reg:
    maxItems: 1

# Client device subnode's properties
patternProperties:
  'grp$':
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.

    properties:
      fsl,pins:
        allOf:
          - $ref: /schemas/types.yaml#/definitions/uint32-array
        description:
          each entry consists of 6 integers and represents the mux and config
          setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
          mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
          be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last
          integer CONFIG is the pad setting value like pull-up on this pin. Please
          refer to i.MX8M Plus Reference Manual for detailed CONFIG settings.

    required:
      - fsl,pins

    additionalProperties: false

required:
  - compatible
  - reg

additionalProperties: false

examples:
  # Pinmux controller node
  - |
    iomuxc: pinctrl@30330000 {
        compatible = "fsl,imx8mp-iomuxc";
        reg = <0x30330000 0x10000>;

        pinctrl_uart2: uart2grp {
            fsl,pins = <
                0x228 0x488 0x5F0 0x0 0x6	0x49
                0x228 0x488 0x000 0x0 0x0	0x49
            >;
        };
    };

...