| commit | 0da310e82d3a9bff6ef6b0f2fbf45d1a05cc64fe | [log] [tgz] |
|---|---|---|
| author | Zong Li <zong.li@sifive.com> | Thu Jan 02 11:09:54 2020 +0800 |
| committer | Paul Walmsley <paul.walmsley@sifive.com> | Fri Jan 03 00:47:02 2020 -0800 |
| tree | f8e5eeb96d120146213c3421f7f05b65b67f8dd2 | |
| parent | ac51e005fe1456a288929a41d71adc6224e912d2 [diff] |
riscv: gcov: enable gcov for RISC-V This patch enables GCOV code coverage measurement on RISC-V. Lightly tested on QEMU and Hifive Unleashed board, seems to work as expected. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Acked-by: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>