)]}' { "commit": "92a0610b6acd3bfdc977b612853ba6711447e887", "tree": "43ef29eb21ba8a33e5de80242ce80b9ed13a27df", "parents": [ "ca1b66922a702316734bcd5ea2100e5fb8f3caa3", "e1ebb2b49048c4767cfa0d8466f9c701e549fa5e" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Oct 12 10:24:40 2020 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Oct 12 10:24:40 2020 -0700" }, "message": "Merge tag \u0027x86_cpu_for_v5.10\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip\n\nPull x86 cpu updates from Borislav Petkov:\n\n - Add support for hardware-enforced cache coherency on AMD which\n obviates the need to flush cachelines before changing the PTE\n encryption bit (Krish Sadhukhan)\n\n - Add Centaur initialization support for families \u003e\u003d 7 (Tony W Wang-oc)\n\n - Add a feature flag for, and expose TSX suspend load tracking feature\n to KVM (Cathy Zhang)\n\n - Emulate SLDT and STR so that windows programs don\u0027t crash on UMIP\n machines (Brendan Shanks and Ricardo Neri)\n\n - Use the new SERIALIZE insn on Intel hardware which supports it\n (Ricardo Neri)\n\n - Misc cleanups and fixes\n\n* tag \u0027x86_cpu_for_v5.10\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:\n KVM: SVM: Don\u0027t flush cache if hardware enforces cache coherency across encryption domains\n x86/mm/pat: Don\u0027t flush cache if hardware enforces cache coherency across encryption domnains\n x86/cpu: Add hardware-enforced cache coherency as a CPUID feature\n x86/cpu/centaur: Add Centaur family \u003e\u003d7 CPUs initialization support\n x86/cpu/centaur: Replace two-condition switch-case with an if statement\n x86/kvm: Expose TSX Suspend Load Tracking feature\n x86/cpufeatures: Enumerate TSX suspend load address tracking instructions\n x86/umip: Add emulation/spoofing for SLDT and STR instructions\n x86/cpu: Fix typos and improve the comments in sync_core()\n x86/cpu: Use XGETBV and XSETBV mnemonics in fpu/internal.h\n x86/cpu: Use SERIALIZE in sync_core() when available\n", "tree_diff": [] }