)]}'
{
  "commit": "08dad2f4d541fcfe5e7bfda72cc6314bbfd2802f",
  "tree": "13074dff20bd66359da00357239f590a1662d7f2",
  "parents": [
    "666eb96d85dcbc93aacc186a037db2e05b92b9f5"
  ],
  "author": {
    "name": "Jesper Nilsson",
    "email": "jesper.nilsson@axis.com",
    "time": "Fri Sep 10 21:55:34 2021 +0200"
  },
  "committer": {
    "name": "David S. Miller",
    "email": "davem@davemloft.net",
    "time": "Sat Sep 11 10:19:51 2021 +0100"
  },
  "message": "net: stmmac: allow CSR clock of 300MHz\n\nThe Synopsys Ethernet IP uses the CSR clock as a base clock for MDC.\nThe divisor used is set in the MAC_MDIO_Address register field CR\n(Clock Rate)\n\nThe divisor is there to change the CSR clock into a clock that falls\nbelow the IEEE 802.3 specified max frequency of 2.5MHz.\n\nIf the CSR clock is 300MHz, the code falls back to using the reset\nvalue in the MAC_MDIO_Address register, as described in the comment\nabove this code.\n\nHowever, 300MHz is actually an allowed value and the proper divider\ncan be estimated quite easily (it\u0027s just 1Hz difference!)\n\nA CSR frequency of 300MHz with the maximum clock rate value of 0x5\n(STMMAC_CSR_250_300M, a divisor of 124) gives somewhere around\n~2.42MHz which is below the IEEE 802.3 specified maximum.\n\nFor the ARTPEC-8 SoC, the CSR clock is this problematic 300MHz,\nand unfortunately, the reset-value of the MAC_MDIO_Address CR field\nis 0x0.\n\nThis leads to a clock rate of zero and a divisor of 42, and gives an\nMDC frequency of ~7.14MHz.\n\nAllow CSR clock of 300MHz by making the comparison inclusive.\n\nSigned-off-by: Jesper Nilsson \u003cjesper.nilsson@axis.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "246f84fedbc87223182736b0c0b68edd3c7721eb",
      "old_mode": 33188,
      "old_path": "drivers/net/ethernet/stmicro/stmmac/stmmac_main.c",
      "new_id": "553c4403258aa2c30cb2ca06f30f2db69efc6f3f",
      "new_mode": 33188,
      "new_path": "drivers/net/ethernet/stmicro/stmmac/stmmac_main.c"
    }
  ]
}