)]}'
{
  "commit": "427900d27d86b820c559037a984bd403f910860f",
  "tree": "52864c18b088f6a74e578d24744c194d1333cc05",
  "parents": [
    "472430a7b066f19afa1b55867d621b2d6d323e0d"
  ],
  "author": {
    "name": "Jiaran Zhang",
    "email": "zhangjiaran@huawei.com",
    "time": "Mon Sep 13 21:08:25 2021 +0800"
  },
  "committer": {
    "name": "David S. Miller",
    "email": "davem@davemloft.net",
    "time": "Mon Sep 13 14:25:37 2021 +0100"
  },
  "message": "net: hns3: fix the timing issue of VF clearing interrupt sources\n\nCurrently, the VF does not clear the interrupt source immediately after\nreceiving the interrupt. As a result, if the second interrupt task is\ntriggered when processing the first interrupt task, clearing the\ninterrupt source before exiting will clear the interrupt sources of the\ntwo tasks at the same time. As a result, no interrupt is triggered for\nthe second task. The VF detects the missed message only when the next\ninterrupt is generated.\n\nClearing it immediately after executing check_evt_cause ensures that:\n1. Even if two interrupt tasks are triggered at the same time, they can\nbe processed.\n2. If the second task is triggered during the processing of the first\ntask and the interrupt source is not cleared, the interrupt is reported\nafter vector0 is enabled.\n\nFixes: b90fcc5bd904 (\"net: hns3: add reset handling for VF when doing Core/Global/IMP reset\")\nSigned-off-by: Jiaran Zhang \u003czhangjiaran@huawei.com\u003e\nSigned-off-by: Guangbin Huang \u003chuangguangbin2@huawei.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "82e72702012031ef3d719624fd2b4a11f6effeed",
      "old_mode": 33188,
      "old_path": "drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c",
      "new_id": "a69e892277b311f8535ae2abb563119b7038864b",
      "new_mode": 33188,
      "new_path": "drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c"
    }
  ]
}
