)]}'
{
  "commit": "3ecfcf34f0992d11e5eb2458a2108b3320c61ba4",
  "tree": "168af3a321808723abcd5115c8e20a17e411fac7",
  "parents": [
    "a6737fe620315db4a47d577703d516cdea960991",
    "9f393d8e757f79060baf4b2e703bd6b2d0d8d323"
  ],
  "author": {
    "name": "Arnd Bergmann",
    "email": "arnd@arndb.de",
    "time": "Fri Nov 28 17:37:13 2025 +0100"
  },
  "committer": {
    "name": "Arnd Bergmann",
    "email": "arnd@arndb.de",
    "time": "Fri Nov 28 17:37:13 2025 +0100"
  },
  "message": "Merge tag \u0027sunxi-fixes-for-6.18\u0027 of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes\n\nAllwinner fixes for 6.18\n\nJust one fix to correct the \"thead,vlenb\" property for the RISC-V based\nD1 SoC family.\n\n* tag \u0027sunxi-fixes-for-6.18\u0027 of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:\n  riscv: dts: allwinner: d1: fix vlenb property\n",
  "tree_diff": []
}
