Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A10 Display Engine Backend Device Tree Bindings

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

description: |
  The display engine backend exposes layers and sprites to the system.

properties:
  compatible:
    enum:
      - allwinner,sun4i-a10-display-backend
      - allwinner,sun5i-a13-display-backend
      - allwinner,sun6i-a31-display-backend
      - allwinner,sun7i-a20-display-backend
      - allwinner,sun8i-a23-display-backend
      - allwinner,sun8i-a33-display-backend
      - allwinner,sun9i-a80-display-backend

  reg:
    minItems: 1
    maxItems: 2
    items:
      - description: Display Backend registers
      - description: SAT registers

  reg-names:
    minItems: 1
    maxItems: 2
    items:
      - const: be
      - const: sat

  interrupts:
    maxItems: 1

  clocks:
    minItems: 3
    maxItems: 4
    items:
      - description: The backend interface clock
      - description: The backend module clock
      - description: The backend DRAM clock
      - description: The SAT clock

  clock-names:
    minItems: 3
    maxItems: 4
    items:
      - const: ahb
      - const: mod
      - const: ram
      - const: sat

  resets:
    minItems: 1
    maxItems: 2
    items:
      - description: The Backend reset line
      - description: The SAT reset line

  reset-names:
    minItems: 1
    maxItems: 2
    items:
      - const: be
      - const: sat

  # FIXME: This should be made required eventually once every SoC will
  # have the MBUS declared.
  interconnects:
    maxItems: 1

  # FIXME: This should be made required eventually once every SoC will
  # have the MBUS declared.
  interconnect-names:
    const: dma-mem

  ports:
    type: object
    description: |
      A ports node with endpoint definitions as defined in
      Documentation/devicetree/bindings/media/video-interfaces.txt.

    properties:
      "#address-cells":
        const: 1

      "#size-cells":
        const: 0

      port@0:
        type: object
        description: |
          Input endpoints of the controller.

      port@1:
        type: object
        description: |
          Output endpoints of the controller.

    required:
      - "#address-cells"
      - "#size-cells"
      - port@0
      - port@1

    additionalProperties: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets
  - ports

additionalProperties: false

if:
  properties:
    compatible:
      contains:
        const: allwinner,sun8i-a33-display-backend

then:
  properties:
    reg:
      minItems: 2

    reg-names:
      minItems: 2

    clocks:
      minItems: 4

    clock-names:
      minItems: 4

    resets:
      minItems: 2

    reset-names:
      minItems: 2

  required:
    - reg-names
    - reset-names

else:
  properties:
    reg:
      maxItems: 1

    reg-names:
      maxItems: 1

    clocks:
      maxItems: 3

    clock-names:
      maxItems: 3

    resets:
      maxItems: 1

    reset-names:
      maxItems: 1

examples:
  - |
    /*
     * This comes from the clock/sun4i-a10-ccu.h and
     * reset/sun4i-a10-ccu.h headers, but we can't include them since
     * it would trigger a bunch of warnings for redefinitions of
     * symbols with the other example.
     */

    #define CLK_AHB_DE_BE0	42
    #define CLK_DRAM_DE_BE0	140
    #define CLK_DE_BE0		144
    #define RST_DE_BE0		5

    display-backend@1e60000 {
        compatible = "allwinner,sun4i-a10-display-backend";
        reg = <0x01e60000 0x10000>;
        interrupts = <47>;
        clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
                 <&ccu CLK_DRAM_DE_BE0>;
        clock-names = "ahb", "mod",
                      "ram";
        resets = <&ccu RST_DE_BE0>;

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0>;

                endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&fe0_out_be0>;
                };

                endpoint@1 {
                    reg = <1>;
                    remote-endpoint = <&fe1_out_be0>;
                };
            };

            port@1 {
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <1>;

                endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&tcon0_in_be0>;
                };

                endpoint@1 {
                    reg = <1>;
                    remote-endpoint = <&tcon1_in_be0>;
                };
            };
        };
    };

  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    /*
     * This comes from the clock/sun8i-a23-a33-ccu.h and
     * reset/sun8i-a23-a33-ccu.h headers, but we can't include them
     * since it would trigger a bunch of warnings for redefinitions of
     * symbols with the other example.
     */

    #define CLK_BUS_DE_BE	40
    #define CLK_BUS_SAT		46
    #define CLK_DRAM_DE_BE	84
    #define CLK_DE_BE		85
    #define RST_BUS_DE_BE	21
    #define RST_BUS_SAT		27

    display-backend@1e60000 {
        compatible = "allwinner,sun8i-a33-display-backend";
        reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
        reg-names = "be", "sat";
        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
                 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
        clock-names = "ahb", "mod",
                      "ram", "sat";
        resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
        reset-names = "be", "sat";

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;

                endpoint {
                    remote-endpoint = <&fe0_out_be0>;
                };
            };

            port@1 {
                reg = <1>;

                endpoint {
                    remote-endpoint = <&drc0_in_be0>;
                };
            };
        };
    };

...