| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Intel LGM SoC NAND Controller Device Tree Bindings |
| |
| allOf: |
| - $ref: "nand-controller.yaml" |
| |
| maintainers: |
| - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> |
| |
| properties: |
| compatible: |
| const: intel,lgm-nand |
| |
| reg: |
| maxItems: 6 |
| |
| reg-names: |
| items: |
| - const: ebunand |
| - const: hsnand |
| - const: nand_cs0 |
| - const: nand_cs1 |
| - const: addr_sel0 |
| - const: addr_sel1 |
| |
| clocks: |
| maxItems: 1 |
| |
| dmas: |
| maxItems: 2 |
| |
| dma-names: |
| items: |
| - const: tx |
| - const: rx |
| |
| "#address-cells": |
| const: 1 |
| |
| "#size-cells": |
| const: 0 |
| |
| patternProperties: |
| "^nand@[a-f0-9]+$": |
| type: object |
| properties: |
| reg: |
| minimum: 0 |
| maximum: 7 |
| |
| nand-ecc-mode: true |
| |
| nand-ecc-algo: |
| const: hw |
| |
| additionalProperties: false |
| |
| required: |
| - compatible |
| - reg |
| - reg-names |
| - clocks |
| - dmas |
| - dma-names |
| - "#address-cells" |
| - "#size-cells" |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| nand-controller@e0f00000 { |
| compatible = "intel,lgm-nand"; |
| reg = <0xe0f00000 0x100>, |
| <0xe1000000 0x300>, |
| <0xe1400000 0x8000>, |
| <0xe1c00000 0x1000>, |
| <0x17400000 0x4>, |
| <0x17c00000 0x4>; |
| reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1", |
| "addr_sel0", "addr_sel1"; |
| clocks = <&cgu0 125>; |
| dmas = <&dma0 8>, <&dma0 9>; |
| dma-names = "tx", "rx"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| nand@0 { |
| reg = <0>; |
| nand-ecc-mode = "hw"; |
| }; |
| }; |
| |
| ... |
