| /* SPDX-License-Identifier: GPL-2.0-only */ |
| /* |
| * Copyright 2015 Linaro Limited |
| */ |
| |
| #ifndef _DT_BINDINGS_RESET_MSM_GCC_8916_H |
| #define _DT_BINDINGS_RESET_MSM_GCC_8916_H |
| |
| #define GCC_BLSP1_BCR 0 |
| #define GCC_BLSP1_QUP1_BCR 1 |
| #define GCC_BLSP1_UART1_BCR 2 |
| #define GCC_BLSP1_QUP2_BCR 3 |
| #define GCC_BLSP1_UART2_BCR 4 |
| #define GCC_BLSP1_QUP3_BCR 5 |
| #define GCC_BLSP1_QUP4_BCR 6 |
| #define GCC_BLSP1_QUP5_BCR 7 |
| #define GCC_BLSP1_QUP6_BCR 8 |
| #define GCC_IMEM_BCR 9 |
| #define GCC_SMMU_BCR 10 |
| #define GCC_APSS_TCU_BCR 11 |
| #define GCC_SMMU_XPU_BCR 12 |
| #define GCC_PCNOC_TBU_BCR 13 |
| #define GCC_PRNG_BCR 14 |
| #define GCC_BOOT_ROM_BCR 15 |
| #define GCC_CRYPTO_BCR 16 |
| #define GCC_SEC_CTRL_BCR 17 |
| #define GCC_AUDIO_CORE_BCR 18 |
| #define GCC_ULT_AUDIO_BCR 19 |
| #define GCC_DEHR_BCR 20 |
| #define GCC_SYSTEM_NOC_BCR 21 |
| #define GCC_PCNOC_BCR 22 |
| #define GCC_TCSR_BCR 23 |
| #define GCC_QDSS_BCR 24 |
| #define GCC_DCD_BCR 25 |
| #define GCC_MSG_RAM_BCR 26 |
| #define GCC_MPM_BCR 27 |
| #define GCC_SPMI_BCR 28 |
| #define GCC_SPDM_BCR 29 |
| #define GCC_MM_SPDM_BCR 30 |
| #define GCC_BIMC_BCR 31 |
| #define GCC_RBCPR_BCR 32 |
| #define GCC_TLMM_BCR 33 |
| #define GCC_USB_HS_BCR 34 |
| #define GCC_USB2A_PHY_BCR 35 |
| #define GCC_SDCC1_BCR 36 |
| #define GCC_SDCC2_BCR 37 |
| #define GCC_PDM_BCR 38 |
| #define GCC_SNOC_BUS_TIMEOUT0_BCR 39 |
| #define GCC_PCNOC_BUS_TIMEOUT0_BCR 40 |
| #define GCC_PCNOC_BUS_TIMEOUT1_BCR 41 |
| #define GCC_PCNOC_BUS_TIMEOUT2_BCR 42 |
| #define GCC_PCNOC_BUS_TIMEOUT3_BCR 43 |
| #define GCC_PCNOC_BUS_TIMEOUT4_BCR 44 |
| #define GCC_PCNOC_BUS_TIMEOUT5_BCR 45 |
| #define GCC_PCNOC_BUS_TIMEOUT6_BCR 46 |
| #define GCC_PCNOC_BUS_TIMEOUT7_BCR 47 |
| #define GCC_PCNOC_BUS_TIMEOUT8_BCR 48 |
| #define GCC_PCNOC_BUS_TIMEOUT9_BCR 49 |
| #define GCC_MMSS_BCR 50 |
| #define GCC_VENUS0_BCR 51 |
| #define GCC_MDSS_BCR 52 |
| #define GCC_CAMSS_PHY0_BCR 53 |
| #define GCC_CAMSS_CSI0_BCR 54 |
| #define GCC_CAMSS_CSI0PHY_BCR 55 |
| #define GCC_CAMSS_CSI0RDI_BCR 56 |
| #define GCC_CAMSS_CSI0PIX_BCR 57 |
| #define GCC_CAMSS_PHY1_BCR 58 |
| #define GCC_CAMSS_CSI1_BCR 59 |
| #define GCC_CAMSS_CSI1PHY_BCR 60 |
| #define GCC_CAMSS_CSI1RDI_BCR 61 |
| #define GCC_CAMSS_CSI1PIX_BCR 62 |
| #define GCC_CAMSS_ISPIF_BCR 63 |
| #define GCC_CAMSS_CCI_BCR 64 |
| #define GCC_CAMSS_MCLK0_BCR 65 |
| #define GCC_CAMSS_MCLK1_BCR 66 |
| #define GCC_CAMSS_GP0_BCR 67 |
| #define GCC_CAMSS_GP1_BCR 68 |
| #define GCC_CAMSS_TOP_BCR 69 |
| #define GCC_CAMSS_MICRO_BCR 70 |
| #define GCC_CAMSS_JPEG_BCR 71 |
| #define GCC_CAMSS_VFE_BCR 72 |
| #define GCC_CAMSS_CSI_VFE0_BCR 73 |
| #define GCC_OXILI_BCR 74 |
| #define GCC_GMEM_BCR 75 |
| #define GCC_CAMSS_AHB_BCR 76 |
| #define GCC_MDP_TBU_BCR 77 |
| #define GCC_GFX_TBU_BCR 78 |
| #define GCC_GFX_TCU_BCR 79 |
| #define GCC_MSS_TBU_AXI_BCR 80 |
| #define GCC_MSS_TBU_GSS_AXI_BCR 81 |
| #define GCC_MSS_TBU_Q6_AXI_BCR 82 |
| #define GCC_GTCU_AHB_BCR 83 |
| #define GCC_SMMU_CFG_BCR 84 |
| #define GCC_VFE_TBU_BCR 85 |
| #define GCC_VENUS_TBU_BCR 86 |
| #define GCC_JPEG_TBU_BCR 87 |
| #define GCC_PRONTO_TBU_BCR 88 |
| #define GCC_SMMU_CATS_BCR 89 |
| |
| #endif |
