| // SPDX-License-Identifier: GPL-2.0 |
| #include <dt-bindings/clock/jz4780-cgu.h> |
| #include <dt-bindings/clock/ingenic,tcu.h> |
| #include <dt-bindings/dma/jz4780-dma.h> |
| |
| / { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "ingenic,jz4780"; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu0: cpu@0 { |
| device_type = "cpu"; |
| compatible = "ingenic,xburst-fpu1.0-mxu1.1"; |
| reg = <0>; |
| |
| clocks = <&cgu JZ4780_CLK_CPU>; |
| clock-names = "cpu"; |
| }; |
| |
| cpu1: cpu@1 { |
| device_type = "cpu"; |
| compatible = "ingenic,xburst-fpu1.0-mxu1.1"; |
| reg = <1>; |
| |
| clocks = <&cgu JZ4780_CLK_CORE1>; |
| clock-names = "cpu"; |
| }; |
| }; |
| |
| cpuintc: interrupt-controller { |
| #address-cells = <0>; |
| #interrupt-cells = <1>; |
| interrupt-controller; |
| compatible = "mti,cpu-interrupt-controller"; |
| }; |
| |
| intc: interrupt-controller@10001000 { |
| compatible = "ingenic,jz4780-intc"; |
| reg = <0x10001000 0x50>; |
| |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| |
| interrupt-parent = <&cpuintc>; |
| interrupts = <2>; |
| }; |
| |
| ext: ext { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| }; |
| |
| rtc: rtc { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <32768>; |
| }; |
| |
| cgu: jz4780-cgu@10000000 { |
| compatible = "ingenic,jz4780-cgu", "simple-mfd"; |
| reg = <0x10000000 0x100>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x0 0x10000000 0x100>; |
| |
| #clock-cells = <1>; |
| |
| clocks = <&ext>, <&rtc>; |
| clock-names = "ext", "rtc"; |
| |
| otg_phy: usb-phy@3c { |
| compatible = "ingenic,jz4780-phy"; |
| reg = <0x3c 0x10>; |
| |
| clocks = <&cgu JZ4780_CLK_OTG1>; |
| |
| #phy-cells = <0>; |
| |
| status = "disabled"; |
| }; |
| |
| rng: rng@d8 { |
| compatible = "ingenic,jz4780-rng"; |
| reg = <0xd8 0x8>; |
| |
| status = "disabled"; |
| }; |
| }; |
| |
| tcu: timer@10002000 { |
| compatible = "ingenic,jz4780-tcu", |
| "ingenic,jz4770-tcu", |
| "simple-mfd"; |
| reg = <0x10002000 0x1000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x0 0x10002000 0x1000>; |
| |
| #clock-cells = <1>; |
| |
| clocks = <&cgu JZ4780_CLK_RTCLK>, |
| <&cgu JZ4780_CLK_EXCLK>, |
| <&cgu JZ4780_CLK_PCLK>; |
| clock-names = "rtc", "ext", "pclk"; |
| |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <27 26 25>; |
| |
| watchdog: watchdog@0 { |
| compatible = "ingenic,jz4780-watchdog"; |
| reg = <0x0 0xc>; |
| |
| clocks = <&tcu TCU_CLK_WDT>; |
| clock-names = "wdt"; |
| }; |
| |
| pwm: pwm@40 { |
| compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm"; |
| reg = <0x40 0x80>; |
| |
| #pwm-cells = <3>; |
| |
| clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, |
| <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>, |
| <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>, |
| <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>; |
| clock-names = "timer0", "timer1", "timer2", "timer3", |
| "timer4", "timer5", "timer6", "timer7"; |
| }; |
| |
| ost: timer@e0 { |
| compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost"; |
| reg = <0xe0 0x20>; |
| |
| clocks = <&tcu TCU_CLK_OST>; |
| clock-names = "ost"; |
| |
| interrupts = <15>; |
| }; |
| }; |
| |
| rtc_dev: rtc@10003000 { |
| compatible = "ingenic,jz4780-rtc"; |
| reg = <0x10003000 0x4c>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <32>; |
| |
| clocks = <&cgu JZ4780_CLK_RTCLK>; |
| clock-names = "rtc"; |
| }; |
| |
| pinctrl: pin-controller@10010000 { |
| compatible = "ingenic,jz4780-pinctrl"; |
| reg = <0x10010000 0x600>; |
| |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| gpa: gpio@0 { |
| compatible = "ingenic,jz4780-gpio"; |
| reg = <0>; |
| |
| gpio-controller; |
| gpio-ranges = <&pinctrl 0 0 32>; |
| #gpio-cells = <2>; |
| |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <17>; |
| }; |
| |
| gpb: gpio@1 { |
| compatible = "ingenic,jz4780-gpio"; |
| reg = <1>; |
| |
| gpio-controller; |
| gpio-ranges = <&pinctrl 0 32 32>; |
| #gpio-cells = <2>; |
| |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <16>; |
| }; |
| |
| gpc: gpio@2 { |
| compatible = "ingenic,jz4780-gpio"; |
| reg = <2>; |
| |
| gpio-controller; |
| gpio-ranges = <&pinctrl 0 64 32>; |
| #gpio-cells = <2>; |
| |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <15>; |
| }; |
| |
| gpd: gpio@3 { |
| compatible = "ingenic,jz4780-gpio"; |
| reg = <3>; |
| |
| gpio-controller; |
| gpio-ranges = <&pinctrl 0 96 32>; |
| #gpio-cells = <2>; |
| |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <14>; |
| }; |
| |
| gpe: gpio@4 { |
| compatible = "ingenic,jz4780-gpio"; |
| reg = <4>; |
| |
| gpio-controller; |
| gpio-ranges = <&pinctrl 0 128 32>; |
| #gpio-cells = <2>; |
| |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <13>; |
| }; |
| |
| gpf: gpio@5 { |
| compatible = "ingenic,jz4780-gpio"; |
| reg = <5>; |
| |
| gpio-controller; |
| gpio-ranges = <&pinctrl 0 160 32>; |
| #gpio-cells = <2>; |
| |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <12>; |
| }; |
| }; |
| |
| spi0: spi@10043000 { |
| compatible = "ingenic,jz4780-spi"; |
| reg = <0x10043000 0x1c>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <8>; |
| |
| clocks = <&cgu JZ4780_CLK_SSI0>; |
| clock-names = "spi"; |
| |
| dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>, |
| <&dma JZ4780_DMA_SSI0_TX 0xffffffff>; |
| dma-names = "rx", "tx"; |
| |
| status = "disabled"; |
| }; |
| |
| uart0: serial@10030000 { |
| compatible = "ingenic,jz4780-uart"; |
| reg = <0x10030000 0x100>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <51>; |
| |
| clocks = <&ext>, <&cgu JZ4780_CLK_UART0>; |
| clock-names = "baud", "module"; |
| |
| status = "disabled"; |
| }; |
| |
| uart1: serial@10031000 { |
| compatible = "ingenic,jz4780-uart"; |
| reg = <0x10031000 0x100>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <50>; |
| |
| clocks = <&ext>, <&cgu JZ4780_CLK_UART1>; |
| clock-names = "baud", "module"; |
| |
| status = "disabled"; |
| }; |
| |
| uart2: serial@10032000 { |
| compatible = "ingenic,jz4780-uart"; |
| reg = <0x10032000 0x100>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <49>; |
| |
| clocks = <&ext>, <&cgu JZ4780_CLK_UART2>; |
| clock-names = "baud", "module"; |
| |
| status = "disabled"; |
| }; |
| |
| uart3: serial@10033000 { |
| compatible = "ingenic,jz4780-uart"; |
| reg = <0x10033000 0x100>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <48>; |
| |
| clocks = <&ext>, <&cgu JZ4780_CLK_UART3>; |
| clock-names = "baud", "module"; |
| |
| status = "disabled"; |
| }; |
| |
| uart4: serial@10034000 { |
| compatible = "ingenic,jz4780-uart"; |
| reg = <0x10034000 0x100>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <34>; |
| |
| clocks = <&ext>, <&cgu JZ4780_CLK_UART4>; |
| clock-names = "baud", "module"; |
| |
| status = "disabled"; |
| }; |
| |
| spi1: spi@10044000 { |
| compatible = "ingenic,jz4780-spi"; |
| reg = <0x10044000 0x1c>; |
| #address-cells = <1>; |
| #size-sells = <0>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <7>; |
| |
| clocks = <&cgu JZ4780_CLK_SSI1>; |
| clock-names = "spi"; |
| |
| dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>, |
| <&dma JZ4780_DMA_SSI1_TX 0xffffffff>; |
| dma-names = "rx", "tx"; |
| |
| status = "disabled"; |
| }; |
| |
| i2c0: i2c@10050000 { |
| compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| reg = <0x10050000 0x1000>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <60>; |
| |
| clocks = <&cgu JZ4780_CLK_SMB0>; |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pins_i2c0_data>; |
| |
| status = "disabled"; |
| }; |
| |
| i2c1: i2c@10051000 { |
| compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x10051000 0x1000>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <59>; |
| |
| clocks = <&cgu JZ4780_CLK_SMB1>; |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pins_i2c1_data>; |
| |
| status = "disabled"; |
| }; |
| |
| i2c2: i2c@10052000 { |
| compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x10052000 0x1000>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <58>; |
| |
| clocks = <&cgu JZ4780_CLK_SMB2>; |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pins_i2c2_data>; |
| |
| status = "disabled"; |
| }; |
| |
| i2c3: i2c@10053000 { |
| compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x10053000 0x1000>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <57>; |
| |
| clocks = <&cgu JZ4780_CLK_SMB3>; |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pins_i2c3_data>; |
| |
| status = "disabled"; |
| }; |
| |
| i2c4: i2c@10054000 { |
| compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x10054000 0x1000>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <56>; |
| |
| clocks = <&cgu JZ4780_CLK_SMB4>; |
| clock-frequency = <100000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pins_i2c4_data>; |
| |
| status = "disabled"; |
| }; |
| |
| nemc: nemc@13410000 { |
| compatible = "ingenic,jz4780-nemc", "simple-mfd"; |
| reg = <0x13410000 0x10000>; |
| #address-cells = <2>; |
| #size-cells = <1>; |
| ranges = <0 0 0x13410000 0x10000>, |
| <1 0 0x1b000000 0x1000000>, |
| <2 0 0x1a000000 0x1000000>, |
| <3 0 0x19000000 0x1000000>, |
| <4 0 0x18000000 0x1000000>, |
| <5 0 0x17000000 0x1000000>, |
| <6 0 0x16000000 0x1000000>; |
| |
| clocks = <&cgu JZ4780_CLK_NEMC>; |
| |
| status = "disabled"; |
| |
| efuse: efuse@d0 { |
| reg = <0 0xd0 0x30>; |
| compatible = "ingenic,jz4780-efuse"; |
| |
| clocks = <&cgu JZ4780_CLK_AHB2>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| eth0_addr: eth-mac-addr@0x22 { |
| reg = <0x22 0x6>; |
| }; |
| }; |
| }; |
| |
| dma: dma@13420000 { |
| compatible = "ingenic,jz4780-dma"; |
| reg = <0x13420000 0x400>, <0x13421000 0x40>; |
| #dma-cells = <2>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <10>; |
| |
| clocks = <&cgu JZ4780_CLK_PDMA>; |
| }; |
| |
| mmc0: mmc@13450000 { |
| compatible = "ingenic,jz4780-mmc"; |
| reg = <0x13450000 0x1000>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <37>; |
| |
| clocks = <&cgu JZ4780_CLK_MSC0>; |
| clock-names = "mmc"; |
| |
| cap-sd-highspeed; |
| cap-mmc-highspeed; |
| cap-sdio-irq; |
| dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>, |
| <&dma JZ4780_DMA_MSC0_TX 0xffffffff>; |
| dma-names = "rx", "tx"; |
| |
| status = "disabled"; |
| }; |
| |
| mmc1: mmc@13460000 { |
| compatible = "ingenic,jz4780-mmc"; |
| reg = <0x13460000 0x1000>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <36>; |
| |
| clocks = <&cgu JZ4780_CLK_MSC1>; |
| clock-names = "mmc"; |
| |
| cap-sd-highspeed; |
| cap-mmc-highspeed; |
| cap-sdio-irq; |
| dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>, |
| <&dma JZ4780_DMA_MSC1_TX 0xffffffff>; |
| dma-names = "rx", "tx"; |
| |
| status = "disabled"; |
| }; |
| |
| bch: bch@134d0000 { |
| compatible = "ingenic,jz4780-bch"; |
| reg = <0x134d0000 0x10000>; |
| |
| clocks = <&cgu JZ4780_CLK_BCH>; |
| |
| status = "disabled"; |
| }; |
| |
| otg: usb@13500000 { |
| compatible = "ingenic,jz4780-otg", "snps,dwc2"; |
| reg = <0x13500000 0x40000>; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <21>; |
| |
| clocks = <&cgu JZ4780_CLK_UHC>; |
| clock-names = "otg"; |
| |
| phys = <&otg_phy>; |
| phy-names = "usb2-phy"; |
| |
| g-rx-fifo-size = <768>; |
| g-np-tx-fifo-size = <256>; |
| g-tx-fifo-size = <256 256 256 256 256 256 256 512>; |
| |
| status = "disabled"; |
| }; |
| }; |
