This is a tag of the clk-next branches which were pulled in Linus' 3.5
merge window. Below is a dummy request-pull against v3.4 to illustrate
the interesting stuff. Please send any questions to
mturquette@linaro.org and Cc linux-arm-kernel@lists.infradead.org.
The following changes since commit 66f75a5d028beaf67c931435fdc3e7823125730c:
Linux 3.4-rc4 (2012-04-21 14:47:52 -0700)
are available in the git repository at:
git://git.linaro.org/people/mturquette/linux.git clk-next
for you to fetch changes up to 7e0fa1b5fa91d9aa456d102c273b2cf0f2e95d39:
clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate(). (2012-05-15 22:42:10 -0700)
----------------------------------------------------------------
Andrew Lunn (14):
ARM: Orion: Add clocks using the generic clk infrastructure.
ARM: Orion: SPI: Add clk/clkdev support.
ARM: Orion: Eth: Add clk/clkdev support.
ARM: Orion: WDT: Add clk/clkdev support
ARM: Orion: UART: Get the clock rate via clk_get_rate().
ARM: Orion: SATA: Add per channel clk/clkdev support.
ARM: Orion: EHCI: Add support for enabling clocks
ARM: Orion: NAND: Add support for clk, if there is one.
ARM: Orion: SDIO: Add support for clk.
ARM: Orion: CESA: Add support for clk
ARM: Orion: XOR: Add support for clk
ARM: Orion: PCIE: Add support for clk
ARM: Orion: Audio: Add clk/clkdev support
ARM: Kirkwood: Replace clock gating
Mark Brown (3):
clk: Remove comment for end of CONFIG_COMMON_CLK section
clk: Constify parent name arrays
clk: Provide dummy clk_unregister()
Mike Turquette (10):
clk: core: correct clk_set_rate kerneldoc
clk: core: remove dead code paths
clk: core: clk_calc_new_rates handles NULL parents
clk: core: enforce clk_ops consistency
clk: core: copy parent_names & return error codes
clk: basic: improve parent_names & return errors
MAINTAINERS: add entry for common clk framework
clk: prevent spurious parent rate propagation
clk: remove COMMON_CLK_DISABLE_UNUSED
clk: mux: assign init data
Rajendra Nayak (2):
clk: Make clk_get_rate() return 0 on error
clk: constify parent name arrays in macros
Rob Herring (2):
clk: select CLKDEV_LOOKUP for COMMON_CLK
clk: remove trailing whitespace from clk.h
Saravana Kannan (2):
clk: Use a separate struct for holding init data.
clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
Sascha Hauer (1):
clk: add a fixed factor clock
Shawn Guo (7):
clk: use kzalloc in clk_register_mux
clk: remove unnecessary EXPORT_SYMBOL_GPL
clk: add "const" for clk_ops of basic clks
clk: declare clk_ops of basic clks in clk-provider.h
clk: always pass parent_rate into .round_rate
clk: pass parent_rate into .set_rate
clk: propagate round_rate for CLK_SET_RATE_PARENT case
Viresh Kumar (5):
clk: Fix typo in comment
clk: clk-gate: Create clk_gate_endisable()
clk: clk-private: Add DEFINE_CLK macro
clk: Don't set clk->new_rate twice
clk: clk_set_rate() must fail if CLK_SET_RATE_GATE is set and clk is enabled
MAINTAINERS | 10 +
arch/arm/Kconfig | 1 +
arch/arm/mach-dove/common.c | 39 +--
arch/arm/mach-dove/dove-db-setup.c | 1 -
arch/arm/mach-kirkwood/board-dreamplug.c | 1 -
arch/arm/mach-kirkwood/board-dt.c | 3 +
arch/arm/mach-kirkwood/common.c | 274 +++++++++++++-------
arch/arm/mach-kirkwood/common.h | 1 +
arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 16 ++
arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c | 1 -
arch/arm/mach-kirkwood/pcie.c | 25 +-
arch/arm/mach-kirkwood/rd88f6192-nas-setup.c | 1 -
arch/arm/mach-kirkwood/t5325-setup.c | 1 -
arch/arm/mach-kirkwood/tsx1x-common.c | 1 -
arch/arm/mach-mv78xx0/common.c | 45 ++--
arch/arm/mach-orion5x/common.c | 27 +-
arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 1 -
arch/arm/plat-orion/common.c | 104 ++++----
arch/arm/plat-orion/include/plat/common.h | 34 +--
arch/arm/plat-orion/include/plat/orion_wdt.h | 18 --
arch/arm/plat-orion/pcie.c | 4 +-
drivers/ata/sata_mv.c | 40 ++-
drivers/clk/Kconfig | 12 +-
drivers/clk/Makefile | 2 +-
drivers/clk/clk-divider.c | 68 ++---
drivers/clk/clk-fixed-factor.c | 95 +++++++
drivers/clk/clk-fixed-rate.c | 49 ++--
drivers/clk/clk-gate.c | 104 ++++----
drivers/clk/clk-mux.c | 27 +-
drivers/clk/clk.c | 279 ++++++++++++++-------
drivers/crypto/mv_cesa.c | 14 ++
drivers/dma/mv_xor.c | 15 ++
drivers/dma/mv_xor.h | 1 +
drivers/mmc/host/mvsdio.c | 14 ++
drivers/mtd/nand/orion_nand.c | 18 ++
drivers/net/ethernet/marvell/mv643xx_eth.c | 42 +++-
drivers/spi/spi-orion.c | 30 ++-
drivers/usb/host/ehci-orion.c | 16 ++
drivers/watchdog/orion_wdt.c | 16 +-
include/linux/clk-private.h | 99 ++++----
include/linux/clk-provider.h | 120 ++++++---
include/linux/clk.h | 6 +-
include/linux/mv643xx_eth.h | 1 -
include/linux/spi/orion_spi.h | 17 --
sound/soc/kirkwood/kirkwood-i2s.c | 13 +
sound/soc/kirkwood/kirkwood.h | 1 +
46 files changed, 1121 insertions(+), 586 deletions(-)
delete mode 100644 arch/arm/plat-orion/include/plat/orion_wdt.h
create mode 100644 drivers/clk/clk-fixed-factor.c
delete mode 100644 include/linux/spi/orion_spi.h
clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
The clk_set_rate() code shouldn't check the clock's enable count when
validating CLK_SET_RATE_GATE flag since the enable count could change after
the validation. Similar to clk_set_parent(), it should instead check the
prepare count. The prepare count should go to zero only when the end user
expects the clock to not be enabled in the future. Since the code already
grabs the prepare count before validation, it's not possible for prepare
count to change after validation and by association not possible for a well
behaving end user to enable the clock while the set rate is in progress.
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
Reviewed-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
1 file changed
