)]}'
{
  "commit": "03de3e44a706cd96f75ede209cb289324367ed4b",
  "tree": "6b8fe966f43cac4c0b2c850a91f2a56847a03e94",
  "parents": [
    "cd80afff4877e1151ce53d48b65eba9de80ac1d2",
    "5efaf92da4365cb8d1ae6dd7a2d1245c69e09ff5"
  ],
  "author": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Sun Dec 28 09:44:26 2025 -0800"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Sun Dec 28 09:44:26 2025 -0800"
  },
  "message": "Merge tag \u0027riscv-for-linus-6.19-rc3\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux\n\nPull RISC-V updates from Paul Walmsley:\n \"Nothing exotic here; these are the cleanup and new ISA extension\n  probing patches (not including CFI):\n\n   - Add probing and userspace reporting support for the standard RISC-V\n     ISA extensions Zilsd and Zclsd, which implement load/store dual\n     instructions on RV32\n\n   - Abstract the register saving code in setup_sigcontext() so it can\n     be used for stateful RISC-V ISA extensions beyond the vector\n     extension\n\n   - Add the SBI extension ID and some initial data structure\n     definitions for the RISC-V standard SBI debug trigger extension\n\n   - Clean up some code slightly: change some page table functions to\n     avoid atomic operations oinn !SMP and to avoid unnecessary casts to\n     atomic_long_t; and use the existing RISCV_FULL_BARRIER macro in\n     place of some open-coded \u0027fence rw,rw\u0027 instructions\"\n\n* tag \u0027riscv-for-linus-6.19-rc3\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:\n  riscv: Add SBI debug trigger extension and function ids\n  riscv/atomic.h: use RISCV_FULL_BARRIER in _arch_atomic* function.\n  riscv: hwprobe: export Zilsd and Zclsd ISA extensions\n  riscv: add ISA extension parsing for Zilsd and Zclsd\n  dt-bindings: riscv: add Zilsd and Zclsd extension descriptions\n  riscv: mm: use xchg() on non-atomic_long_t variables, not atomic_long_xchg()\n  riscv: mm: ptep_get_and_clear(): avoid atomic ops when !CONFIG_SMP\n  riscv: mm: pmdp_huge_get_and_clear(): avoid atomic ops when !CONFIG_SMP\n  riscv: signal: abstract header saving for setup_sigcontext\n",
  "tree_diff": []
}