blob: 378b761237d3a29d8dd1e749da0420814d233a83 [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/mediatek,mt6795-sys-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek System Clock Controller for MT6795
maintainers:
- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
- Chun-Jie Chen <chun-jie.chen@mediatek.com>
description:
The Mediatek system clock controller provides various clocks and system
configuration like reset and bus protection on MT6795.
properties:
compatible:
items:
- enum:
- mediatek,mt6795-apmixedsys
- mediatek,mt6795-infracfg
- mediatek,mt6795-pericfg
- mediatek,mt6795-topckgen
- const: syscon
reg:
maxItems: 1
'#clock-cells':
const: 1
'#reset-cells':
const: 1
required:
- compatible
- reg
- '#clock-cells'
additionalProperties: false
examples:
- |
soc {
#address-cells = <2>;
#size-cells = <2>;
topckgen: clock-controller@10000000 {
compatible = "mediatek,mt6795-topckgen", "syscon";
reg = <0 0x10000000 0 0x1000>;
#clock-cells = <1>;
};
};