| /* |
| * MPC8272 ADS Device Tree Source |
| * |
| * Copyright 2005 Freescale Semiconductor Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify it |
| * under the terms of the GNU General Public License as published by the |
| * Free Software Foundation; either version 2 of the License, or (at your |
| * option) any later version. |
| */ |
| |
| / { |
| model = "MPC8272ADS"; |
| compatible = "fsl,mpc8272ads"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| PowerPC,8272@0 { |
| device_type = "cpu"; |
| reg = <0>; |
| d-cache-line-size = <d#32>; |
| i-cache-line-size = <d#32>; |
| d-cache-size = <d#16384>; |
| i-cache-size = <d#16384>; |
| timebase-frequency = <0>; |
| bus-frequency = <0>; |
| clock-frequency = <0>; |
| }; |
| }; |
| |
| memory { |
| device_type = "memory"; |
| reg = <0 0>; |
| }; |
| |
| localbus@f0010100 { |
| compatible = "fsl,mpc8272-localbus", |
| "fsl,pq2-localbus"; |
| #address-cells = <2>; |
| #size-cells = <1>; |
| reg = <f0010100 40>; |
| |
| ranges = <0 0 fe000000 02000000 |
| 1 0 f4500000 00008000 |
| 3 0 f8200000 00008000>; |
| |
| flash@0,0 { |
| compatible = "jedec-flash"; |
| reg = <0 0 2000000>; |
| bank-width = <4>; |
| device-width = <1>; |
| }; |
| |
| board-control@1,0 { |
| reg = <1 0 20>; |
| compatible = "fsl,mpc8272ads-bcsr"; |
| }; |
| |
| PCI_PIC: interrupt-controller@3,0 { |
| compatible = "fsl,mpc8272ads-pci-pic", |
| "fsl,pq2ads-pci-pic"; |
| #interrupt-cells = <1>; |
| interrupt-controller; |
| reg = <3 0 8>; |
| interrupt-parent = <&PIC>; |
| interrupts = <14 8>; |
| }; |
| }; |
| |
| |
| pci@f0010800 { |
| device_type = "pci"; |
| reg = <f0010800 10c f00101ac 8 f00101c4 8>; |
| compatible = "fsl,mpc8272-pci", "fsl,pq2-pci"; |
| #interrupt-cells = <1>; |
| #size-cells = <2>; |
| #address-cells = <3>; |
| clock-frequency = <d#66666666>; |
| interrupt-map-mask = <f800 0 0 7>; |
| interrupt-map = < |
| /* IDSEL 0x16 */ |
| b000 0 0 1 &PCI_PIC 0 |
| b000 0 0 2 &PCI_PIC 1 |
| b000 0 0 3 &PCI_PIC 2 |
| b000 0 0 4 &PCI_PIC 3 |
| |
| /* IDSEL 0x17 */ |
| b800 0 0 1 &PCI_PIC 4 |
| b800 0 0 2 &PCI_PIC 5 |
| b800 0 0 3 &PCI_PIC 6 |
| b800 0 0 4 &PCI_PIC 7 |
| |
| /* IDSEL 0x18 */ |
| c000 0 0 1 &PCI_PIC 8 |
| c000 0 0 2 &PCI_PIC 9 |
| c000 0 0 3 &PCI_PIC a |
| c000 0 0 4 &PCI_PIC b>; |
| |
| interrupt-parent = <&PIC>; |
| interrupts = <12 8>; |
| ranges = <42000000 0 80000000 80000000 0 20000000 |
| 02000000 0 a0000000 a0000000 0 20000000 |
| 01000000 0 00000000 f6000000 0 02000000>; |
| }; |
| |
| soc@f0000000 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| device_type = "soc"; |
| compatible = "fsl,mpc8272", "fsl,pq2-soc"; |
| ranges = <00000000 f0000000 00053000>; |
| |
| // Temporary -- will go away once kernel uses ranges for get_immrbase(). |
| reg = <f0000000 00053000>; |
| |
| cpm@119c0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; |
| reg = <119c0 30>; |
| ranges; |
| |
| muram@0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0 0 10000>; |
| |
| data@0 { |
| compatible = "fsl,cpm-muram-data"; |
| reg = <0 2000 9800 800>; |
| }; |
| }; |
| |
| brg@119f0 { |
| compatible = "fsl,mpc8272-brg", |
| "fsl,cpm2-brg", |
| "fsl,cpm-brg"; |
| reg = <119f0 10 115f0 10>; |
| }; |
| |
| serial@11a00 { |
| device_type = "serial"; |
| compatible = "fsl,mpc8272-scc-uart", |
| "fsl,cpm2-scc-uart"; |
| reg = <11a00 20 8000 100>; |
| interrupts = <28 8>; |
| interrupt-parent = <&PIC>; |
| fsl,cpm-brg = <1>; |
| fsl,cpm-command = <00800000>; |
| }; |
| |
| serial@11a60 { |
| device_type = "serial"; |
| compatible = "fsl,mpc8272-scc-uart", |
| "fsl,cpm2-scc-uart"; |
| reg = <11a60 20 8300 100>; |
| interrupts = <2b 8>; |
| interrupt-parent = <&PIC>; |
| fsl,cpm-brg = <4>; |
| fsl,cpm-command = <0ce00000>; |
| }; |
| |
| mdio@10d40 { |
| device_type = "mdio"; |
| compatible = "fsl,mpc8272ads-mdio-bitbang", |
| "fsl,mpc8272-mdio-bitbang", |
| "fsl,cpm2-mdio-bitbang"; |
| reg = <10d40 14>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| fsl,mdio-pin = <12>; |
| fsl,mdc-pin = <13>; |
| |
| PHY0: ethernet-phy@0 { |
| interrupt-parent = <&PIC>; |
| interrupts = <17 8>; |
| reg = <0>; |
| device_type = "ethernet-phy"; |
| }; |
| |
| PHY1: ethernet-phy@1 { |
| interrupt-parent = <&PIC>; |
| interrupts = <17 8>; |
| reg = <3>; |
| device_type = "ethernet-phy"; |
| }; |
| }; |
| |
| ethernet@11300 { |
| device_type = "network"; |
| compatible = "fsl,mpc8272-fcc-enet", |
| "fsl,cpm2-fcc-enet"; |
| reg = <11300 20 8400 100 11390 1>; |
| local-mac-address = [ 00 00 00 00 00 00 ]; |
| interrupts = <20 8>; |
| interrupt-parent = <&PIC>; |
| phy-handle = <&PHY0>; |
| linux,network-index = <0>; |
| fsl,cpm-command = <12000300>; |
| }; |
| |
| ethernet@11320 { |
| device_type = "network"; |
| compatible = "fsl,mpc8272-fcc-enet", |
| "fsl,cpm2-fcc-enet"; |
| reg = <11320 20 8500 100 113b0 1>; |
| local-mac-address = [ 00 00 00 00 00 00 ]; |
| interrupts = <21 8>; |
| interrupt-parent = <&PIC>; |
| phy-handle = <&PHY1>; |
| linux,network-index = <1>; |
| fsl,cpm-command = <16200300>; |
| }; |
| }; |
| |
| PIC: interrupt-controller@10c00 { |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| reg = <10c00 80>; |
| compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic"; |
| }; |
| |
| /* May need to remove if on a part without crypto engine */ |
| crypto@30000 { |
| device_type = "crypto"; |
| model = "SEC2"; |
| compatible = "fsl,mpc8272-talitos-sec2", |
| "fsl,talitos-sec2", |
| "fsl,talitos", |
| "talitos"; |
| reg = <30000 10000>; |
| interrupts = <b 8>; |
| interrupt-parent = <&PIC>; |
| num-channels = <4>; |
| channel-fifo-len = <18>; |
| exec-units-mask = <0000007e>; |
| /* desc mask is for rev1.x, we need runtime fixup for >=2.x */ |
| descriptor-types-mask = <01010ebf>; |
| }; |
| }; |
| |
| chosen { |
| linux,stdout-path = "/soc/cpm/serial@11a00"; |
| }; |
| }; |
