tree 3841ccf38b20b4e0b3adbb3aa12c801cff69450e
parent 015b528644a84b0018d3286ecd6ea5f82dce0180
author Alexandre Belloni <alexandre.belloni@free-electrons.com> 1488475872 +0100
committer Wim Van Sebroeck <wim@iguana.be> 1495126284 +0200

watchdog: sama5d4: fix race condition

WDT_MR and WDT_CR must not updated within three slow clock periods after
the last ping (write to WDT_CR or WDT_MR). Ensure enough time has elapsed
before writing those registers.
wdt_write() waits for 4 periods to ensure at least 3 edges are seen by the
IP.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Wenyou.Yang <wenyou.yang@microchip.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>