| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Copyright 2019-2020 NXP |
| * Dong Aisheng <aisheng.dong@nxp.com> |
| */ |
| |
| &lsio_gpio0 { |
| compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; |
| }; |
| |
| &lsio_gpio1 { |
| compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; |
| }; |
| |
| &lsio_gpio2 { |
| compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; |
| }; |
| |
| &lsio_gpio3 { |
| compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; |
| }; |
| |
| &lsio_gpio4 { |
| compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; |
| }; |
| |
| &lsio_gpio5 { |
| compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; |
| }; |
| |
| &lsio_gpio6 { |
| compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; |
| }; |
| |
| &lsio_gpio7 { |
| compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; |
| }; |
| |
| &lsio_mu0 { |
| compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu"; |
| }; |
| |
| &lsio_mu1 { |
| compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu"; |
| }; |
| |
| &lsio_mu2 { |
| compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu"; |
| }; |
| |
| &lsio_mu3 { |
| compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu"; |
| }; |
| |
| &lsio_mu4 { |
| compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu"; |
| }; |
| |
| &lsio_mu13 { |
| compatible = "fsl,imx8qm-mu", "fsl,imx6sx-mu"; |
| }; |
