ARM:

* Add large stage-2 mapping (THP) support for non-protected guests when
  pKVM is enabled, clawing back some performance.

* Enable nested virtualisation support on systems that support it,
  though it is disabled by default.

* Add UBSAN support to the standalone EL2 object used in nVHE/hVHE and
  protected modes.

* Large rework of the way KVM tracks architecture features and links
  them with the effects of control bits. While this has no functional
  impact, it ensures correctness of emulation (the data is automatically
  extracted from the published JSON files), and helps dealing with the
  evolution of the architecture.

* Significant changes to the way pKVM tracks ownership of pages,
  avoiding page table walks by storing the state in the hypervisor's
  vmemmap. This in turn enables the THP support described above.

* New selftest checking the pKVM ownership transition rules

* Fixes for FEAT_MTE_ASYNC being accidentally advertised to guests
  even if the host didn't have it.

* Fixes for the address translation emulation, which happened to be
  rather buggy in some specific contexts.

* Fixes for the PMU emulation in NV contexts, decoupling PMCR_EL0.N
  from the number of counters exposed to a guest and addressing a
  number of issues in the process.

* Add a new selftest for the SVE host state being corrupted by a
  guest.

* Keep HCR_EL2.xMO set at all times for systems running with the
  kernel at EL2, ensuring that the window for interrupts is slightly
  bigger, and avoiding a pretty bad erratum on the AmpereOne HW.

* Add workaround for AmpereOne's erratum AC04_CPU_23, which suffers
  from a pretty bad case of TLB corruption unless accesses to HCR_EL2
  are heavily synchronised.

* Add a per-VM, per-ITS debugfs entry to dump the state of the ITS
  tables in a human-friendly fashion.

* and the usual random cleanups.

LoongArch:

* Don't flush tlb if the host supports hardware page table walks.

* Add KVM selftests support.

RISC-V:

* Add vector registers to get-reg-list selftest

* VCPU reset related improvements

* Remove scounteren initialization from VCPU reset

* Support VCPU reset from userspace using set_mpstate() ioctl

x86:

* Initial support for TDX in KVM.  This finally makes it possible to use the
  TDX module to run confidential guests on Intel processors.  This is quite a
  large series, including support for private page tables (managed by the
  TDX module and mirrored in KVM for efficiency), forwarding some TDVMCALLs
  to userspace, and handling several special VM exits from the TDX module.

  This has been in the works for literally years and it's not really possible
  to describe everything here, so I'll defer to the various merge commits
  up to and including commit 7bcf7246c42a ("Merge branch 'kvm-tdx-finish-initial'
  into HEAD").

x86/tdx: mark tdh_vp_enter() as __flatten

In some cases tdx_tdvpr_pa() is not fully inlined into tdh_vp_enter(), which
causes the following warning:

  vmlinux.o: warning: objtool: tdh_vp_enter+0x8: call to tdx_tdvpr_pa() leaves .noinstr.text section

This happens if the compiler considers tdx_tdvpr_pa() to be "large", for example
because CONFIG_SPARSEMEM adds two function calls to page_to_section() and
__section_mem_map_addr():

({      const struct page *__pg = (pg);                         \
        int __sec = page_to_section(__pg);                      \
        (unsigned long)(__pg - __section_mem_map_addr(__nr_to_section(__sec)));
\
})

Because exiting the noinstr section is a no-no, just mark tdh_vp_enter() for
full inlining.

Reported-by: kernel test robot <lkp@intel.com>
Analyzed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202505240530.5KktQ5mX-lkp@intel.com/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>