| * Calxeda AHCI SATA Controller |
| |
| SATA nodes are defined to describe on-chip Serial ATA controllers. |
| The Calxeda SATA controller mostly conforms to the AHCI interface |
| with some special extensions to add functionality. |
| Each SATA controller should have its own node. |
| |
| Required properties: |
| - compatible : compatible list, contains "calxeda,hb-ahci" |
| - interrupts : <interrupt mapping for SATA IRQ> |
| - reg : <registers mapping> |
| |
| Optional properties: |
| - dma-coherent : Present if dma operations are coherent |
| - calxeda,port-phys : phandle-combophy and lane assignment, which maps each |
| SATA port to a combophy and a lane within that |
| combophy |
| - calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off, |
| which indicates that the driver supports SGPIO |
| indicator lights using the indicated GPIOs |
| - calxeda,led-order : a u32 array that map port numbers to offsets within the |
| SGPIO bitstream. |
| - calxeda,tx-atten : a u32 array that contains TX attenuation override |
| codes, one per port. The upper 3 bytes are always |
| 0 and thus ignored. |
| - calxeda,pre-clocks : a u32 that indicates the number of additional clock |
| cycles to transmit before sending an SGPIO pattern |
| - calxeda,post-clocks: a u32 that indicates the number of additional clock |
| cycles to transmit after sending an SGPIO pattern |
| |
| Example: |
| sata@ffe08000 { |
| compatible = "calxeda,hb-ahci"; |
| reg = <0xffe08000 0x1000>; |
| interrupts = <115>; |
| dma-coherent; |
| calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1 |
| &combophy0 2 &combophy0 3>; |
| calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>; |
| calxeda,led-order = <4 0 1 2 3>; |
| calxeda,tx-atten = <0xff 22 0xff 0xff 23>; |
| calxeda,pre-clocks = <10>; |
| calxeda,post-clocks = <0>; |
| }; |
