| /* | 
 |  *  linux/arch/arm/boot/nspire.dtsi | 
 |  * | 
 |  *  Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> | 
 |  * | 
 |  * This program is free software; you can redistribute it and/or modify | 
 |  * it under the terms of the GNU General Public License version 2, as | 
 |  * published by the Free Software Foundation. | 
 |  * | 
 |  */ | 
 |  | 
 | /include/ "skeleton.dtsi" | 
 |  | 
 | / { | 
 | 	interrupt-parent = <&intc>; | 
 |  | 
 | 	cpus { | 
 | 		cpu@0 { | 
 | 			compatible = "arm,arm926ejs"; | 
 | 		}; | 
 | 	}; | 
 |  | 
 | 	bootrom: bootrom@00000000 { | 
 | 		reg = <0x00000000 0x80000>; | 
 | 	}; | 
 |  | 
 | 	sram: sram@A4000000 { | 
 | 		device = "memory"; | 
 | 		reg = <0xA4000000 0x20000>; | 
 | 	}; | 
 |  | 
 | 	timer_clk: timer_clk { | 
 | 		#clock-cells = <0>; | 
 | 		compatible = "fixed-clock"; | 
 | 		clock-frequency = <32768>; | 
 | 	}; | 
 |  | 
 | 	base_clk: base_clk { | 
 | 		#clock-cells = <0>; | 
 | 		reg = <0x900B0024 0x4>; | 
 | 	}; | 
 |  | 
 | 	ahb_clk: ahb_clk { | 
 | 		#clock-cells = <0>; | 
 | 		reg = <0x900B0024 0x4>; | 
 | 		clocks = <&base_clk>; | 
 | 	}; | 
 |  | 
 | 	apb_pclk: apb_pclk { | 
 | 		#clock-cells = <0>; | 
 | 		compatible = "fixed-factor-clock"; | 
 | 		clock-div = <2>; | 
 | 		clock-mult = <1>; | 
 | 		clocks = <&ahb_clk>; | 
 | 	}; | 
 |  | 
 | 	ahb { | 
 | 		compatible = "simple-bus"; | 
 | 		#address-cells = <1>; | 
 | 		#size-cells = <1>; | 
 | 		ranges; | 
 |  | 
 | 		spi: spi@A9000000 { | 
 | 			reg = <0xA9000000 0x1000>; | 
 | 		}; | 
 |  | 
 | 		usb0: usb@B0000000 { | 
 | 			reg = <0xB0000000 0x1000>; | 
 | 			interrupts = <8>; | 
 | 		}; | 
 |  | 
 | 		usb1: usb@B4000000 { | 
 | 			reg = <0xB4000000 0x1000>; | 
 | 			interrupts = <9>; | 
 | 			status = "disabled"; | 
 | 		}; | 
 |  | 
 | 		lcd: lcd@C0000000 { | 
 | 			compatible = "arm,pl111", "arm,primecell"; | 
 | 			reg = <0xC0000000 0x1000>; | 
 | 			interrupts = <21>; | 
 |  | 
 | 			clocks = <&apb_pclk>; | 
 | 			clock-names = "apb_pclk"; | 
 | 		}; | 
 |  | 
 | 		adc: adc@C4000000 { | 
 | 			reg = <0xC4000000 0x1000>; | 
 | 			interrupts = <11>; | 
 | 		}; | 
 |  | 
 | 		tdes: crypto@C8010000 { | 
 | 			reg = <0xC8010000 0x1000>; | 
 | 		}; | 
 |  | 
 | 		sha256: crypto@CC000000 { | 
 | 			reg = <0xCC000000 0x1000>; | 
 | 		}; | 
 |  | 
 | 		apb@90000000 { | 
 | 			compatible = "simple-bus"; | 
 | 			#address-cells = <1>; | 
 | 			#size-cells = <1>; | 
 | 			clock-ranges; | 
 | 			ranges; | 
 |  | 
 | 			gpio: gpio@90000000 { | 
 | 				reg = <0x90000000 0x1000>; | 
 | 				interrupts = <7>; | 
 | 			}; | 
 |  | 
 | 			fast_timer: timer@90010000 { | 
 | 				reg = <0x90010000 0x1000>; | 
 | 				interrupts = <17>; | 
 | 			}; | 
 |  | 
 | 			uart: serial@90020000 { | 
 | 				reg = <0x90020000 0x1000>; | 
 | 				interrupts = <1>; | 
 | 			}; | 
 |  | 
 | 			timer0: timer@900C0000 { | 
 | 				reg = <0x900C0000 0x1000>; | 
 |  | 
 | 				clocks = <&timer_clk>; | 
 | 			}; | 
 |  | 
 | 			timer1: timer@900D0000 { | 
 | 				reg = <0x900D0000 0x1000>; | 
 | 				interrupts = <19>; | 
 |  | 
 | 				clocks = <&timer_clk>; | 
 | 			}; | 
 |  | 
 | 			watchdog: watchdog@90060000 { | 
 | 				compatible = "arm,amba-primecell"; | 
 | 				reg = <0x90060000 0x1000>; | 
 | 				interrupts = <3>; | 
 | 			}; | 
 |  | 
 | 			rtc: rtc@90090000 { | 
 | 				reg = <0x90090000 0x1000>; | 
 | 				interrupts = <4>; | 
 | 			}; | 
 |  | 
 | 			misc: misc@900A0000 { | 
 | 				reg = <0x900A0000 0x1000>; | 
 | 			}; | 
 |  | 
 | 			pwr: pwr@900B0000 { | 
 | 				reg = <0x900B0000 0x1000>; | 
 | 				interrupts = <15>; | 
 | 			}; | 
 |  | 
 | 			keypad: input@900E0000 { | 
 | 				compatible = "ti,nspire-keypad"; | 
 | 				reg = <0x900E0000 0x1000>; | 
 | 				interrupts = <16>; | 
 |  | 
 | 				scan-interval = <1000>; | 
 | 				row-delay = <200>; | 
 |  | 
 | 				clocks = <&apb_pclk>; | 
 | 			}; | 
 |  | 
 | 			contrast: contrast@900F0000 { | 
 | 				reg = <0x900F0000 0x1000>; | 
 | 			}; | 
 |  | 
 | 			led: led@90110000 { | 
 | 				reg = <0x90110000 0x1000>; | 
 | 			}; | 
 | 		}; | 
 | 	}; | 
 | }; |