| /* |
| * DaVinci interrupt controller definitions |
| * |
| * Copyright (C) 2006 Texas Instruments. |
| * |
| * This program is free software; you can redistribute it and/or modify it |
| * under the terms of the GNU General Public License as published by the |
| * Free Software Foundation; either version 2 of the License, or (at your |
| * option) any later version. |
| * |
| * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| * |
| * You should have received a copy of the GNU General Public License along |
| * with this program; if not, write to the Free Software Foundation, Inc., |
| * 675 Mass Ave, Cambridge, MA 02139, USA. |
| * |
| */ |
| #ifndef __ASM_ARCH_IRQS_H |
| #define __ASM_ARCH_IRQS_H |
| |
| /* Base address */ |
| #define DAVINCI_ARM_INTC_BASE 0x01C48000 |
| |
| /* Interrupt lines */ |
| #define IRQ_VDINT0 0 |
| #define IRQ_VDINT1 1 |
| #define IRQ_VDINT2 2 |
| #define IRQ_HISTINT 3 |
| #define IRQ_H3AINT 4 |
| #define IRQ_PRVUINT 5 |
| #define IRQ_RSZINT 6 |
| #define IRQ_VFOCINT 7 |
| #define IRQ_VENCINT 8 |
| #define IRQ_ASQINT 9 |
| #define IRQ_IMXINT 10 |
| #define IRQ_VLCDINT 11 |
| #define IRQ_USBINT 12 |
| #define IRQ_EMACINT 13 |
| |
| #define IRQ_CCINT0 16 |
| #define IRQ_CCERRINT 17 |
| #define IRQ_TCERRINT0 18 |
| #define IRQ_TCERRINT 19 |
| #define IRQ_PSCIN 20 |
| |
| #define IRQ_IDE 22 |
| #define IRQ_HPIINT 23 |
| #define IRQ_MBXINT 24 |
| #define IRQ_MBRINT 25 |
| #define IRQ_MMCINT 26 |
| #define IRQ_SDIOINT 27 |
| #define IRQ_MSINT 28 |
| #define IRQ_DDRINT 29 |
| #define IRQ_AEMIFINT 30 |
| #define IRQ_VLQINT 31 |
| #define IRQ_TINT0_TINT12 32 |
| #define IRQ_TINT0_TINT34 33 |
| #define IRQ_TINT1_TINT12 34 |
| #define IRQ_TINT1_TINT34 35 |
| #define IRQ_PWMINT0 36 |
| #define IRQ_PWMINT1 37 |
| #define IRQ_PWMINT2 38 |
| #define IRQ_I2C 39 |
| #define IRQ_UARTINT0 40 |
| #define IRQ_UARTINT1 41 |
| #define IRQ_UARTINT2 42 |
| #define IRQ_SPINT0 43 |
| #define IRQ_SPINT1 44 |
| |
| #define IRQ_DSP2ARM0 46 |
| #define IRQ_DSP2ARM1 47 |
| #define IRQ_GPIO0 48 |
| #define IRQ_GPIO1 49 |
| #define IRQ_GPIO2 50 |
| #define IRQ_GPIO3 51 |
| #define IRQ_GPIO4 52 |
| #define IRQ_GPIO5 53 |
| #define IRQ_GPIO6 54 |
| #define IRQ_GPIO7 55 |
| #define IRQ_GPIOBNK0 56 |
| #define IRQ_GPIOBNK1 57 |
| #define IRQ_GPIOBNK2 58 |
| #define IRQ_GPIOBNK3 59 |
| #define IRQ_GPIOBNK4 60 |
| #define IRQ_COMMTX 61 |
| #define IRQ_COMMRX 62 |
| #define IRQ_EMUINT 63 |
| |
| #define DAVINCI_N_AINTC_IRQ 64 |
| #define DAVINCI_N_GPIO 71 |
| |
| #define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO) |
| |
| #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34 |
| |
| #endif /* __ASM_ARCH_IRQS_H */ |
