| * Marvell PXA1928 Clock Controllers |
| |
| The PXA1928 clock subsystem generates and supplies clock to various |
| controllers within the PXA1928 SoC. The PXA1928 contains 3 clock controller |
| blocks called APMU, MPMU, and APBC roughly corresponding to internal buses. |
| |
| Required Properties: |
| |
| - compatible: should be one of the following. |
| - "marvell,pxa1928-apmu" - APMU controller compatible |
| - "marvell,pxa1928-mpmu" - MPMU controller compatible |
| - "marvell,pxa1928-apbc" - APBC controller compatible |
| - reg: physical base address of the clock controller and length of memory mapped |
| region. |
| - #clock-cells: should be 1. |
| - #reset-cells: should be 1. |
| |
| Each clock is assigned an identifier and client nodes use the clock controller |
| phandle and this identifier to specify the clock which they consume. |
| |
| All these identifiers can be found in <dt-bindings/clock/marvell,pxa1928.h>. |
