| // SPDX-License-Identifier: GPL-2.0 | |
| /* | |
| * Copyright (C) 2014 Intel Corporation | |
| * | |
| * Adjustable fractional divider clock implementation. | |
| * Uses rational best approximation algorithm. | |
| * | |
| * Output is calculated as | |
| * | |
| * rate = (m / n) * parent_rate (1) | |
| * | |
| * This is useful when we have a prescaler block which asks for | |
| * m (numerator) and n (denominator) values to be provided to satisfy | |
| * the (1) as much as possible. | |
| * | |
| * Since m and n have the limitation by a range, e.g. | |
| * | |
| * n >= 1, n < N_width, where N_width = 2^nwidth (2) | |
| * | |
| * for some cases the output may be saturated. Hence, from (1) and (2), | |
| * assuming the worst case when m = 1, the inequality | |
| * | |
| * floor(log2(parent_rate / rate)) <= nwidth (3) | |
| * | |
| * may be derived. Thus, in cases when | |
| * | |
| * (parent_rate / rate) >> N_width (4) | |
| * | |
| * we might scale up the rate by 2^scale (see the description of | |
| * CLK_FRAC_DIVIDER_POWER_OF_TWO_PS for additional information), where | |
| * | |
| * scale = floor(log2(parent_rate / rate)) - nwidth (5) | |
| * | |
| * and assume that the IP, that needs m and n, has also its own | |
| * prescaler, which is capable to divide by 2^scale. In this way | |
| * we get the denominator to satisfy the desired range (2) and | |
| * at the same time a much better result of m and n than simple | |
| * saturated values. | |
| */ | |
| #include <linux/debugfs.h> | |
| #include <linux/device.h> | |
| #include <linux/io.h> | |
| #include <linux/math.h> | |
| #include <linux/module.h> | |
| #include <linux/rational.h> | |
| #include <linux/slab.h> | |
| #include <linux/clk-provider.h> | |
| #include "clk-fractional-divider.h" | |
| static inline u32 clk_fd_readl(struct clk_fractional_divider *fd) | |
| { | |
| if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN) | |
| return ioread32be(fd->reg); | |
| return readl(fd->reg); | |
| } | |
| static inline void clk_fd_writel(struct clk_fractional_divider *fd, u32 val) | |
| { | |
| if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN) | |
| iowrite32be(val, fd->reg); | |
| else | |
| writel(val, fd->reg); | |
| } | |
| static void clk_fd_get_div(struct clk_hw *hw, struct u32_fract *fract) | |
| { | |
| struct clk_fractional_divider *fd = to_clk_fd(hw); | |
| unsigned long flags = 0; | |
| unsigned long m, n; | |
| u32 mmask, nmask; | |
| u32 val; | |
| if (fd->lock) | |
| spin_lock_irqsave(fd->lock, flags); | |
| else | |
| __acquire(fd->lock); | |
| val = clk_fd_readl(fd); | |
| if (fd->lock) | |
| spin_unlock_irqrestore(fd->lock, flags); | |
| else | |
| __release(fd->lock); | |
| mmask = GENMASK(fd->mwidth - 1, 0) << fd->mshift; | |
| nmask = GENMASK(fd->nwidth - 1, 0) << fd->nshift; | |
| m = (val & mmask) >> fd->mshift; | |
| n = (val & nmask) >> fd->nshift; | |
| if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) { | |
| m++; | |
| n++; | |
| } | |
| fract->numerator = m; | |
| fract->denominator = n; | |
| } | |
| static unsigned long clk_fd_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) | |
| { | |
| struct u32_fract fract; | |
| u64 ret; | |
| clk_fd_get_div(hw, &fract); | |
| if (!fract.numerator || !fract.denominator) | |
| return parent_rate; | |
| ret = (u64)parent_rate * fract.numerator; | |
| do_div(ret, fract.denominator); | |
| return ret; | |
| } | |
| void clk_fractional_divider_general_approximation(struct clk_hw *hw, | |
| unsigned long rate, | |
| unsigned long *parent_rate, | |
| unsigned long *m, unsigned long *n) | |
| { | |
| struct clk_fractional_divider *fd = to_clk_fd(hw); | |
| unsigned long max_m, max_n; | |
| /* | |
| * Get rate closer to *parent_rate to guarantee there is no overflow | |
| * for m and n. In the result it will be the nearest rate left shifted | |
| * by (scale - fd->nwidth) bits. | |
| * | |
| * For the detailed explanation see the top comment in this file. | |
| */ | |
| if (fd->flags & CLK_FRAC_DIVIDER_POWER_OF_TWO_PS) { | |
| unsigned long scale = fls_long(*parent_rate / rate - 1); | |
| if (scale > fd->nwidth) | |
| rate <<= scale - fd->nwidth; | |
| } | |
| if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) { | |
| max_m = BIT(fd->mwidth); | |
| max_n = BIT(fd->nwidth); | |
| } else { | |
| max_m = GENMASK(fd->mwidth - 1, 0); | |
| max_n = GENMASK(fd->nwidth - 1, 0); | |
| } | |
| rational_best_approximation(rate, *parent_rate, max_m, max_n, m, n); | |
| } | |
| EXPORT_SYMBOL_GPL(clk_fractional_divider_general_approximation); | |
| static int clk_fd_determine_rate(struct clk_hw *hw, | |
| struct clk_rate_request *req) | |
| { | |
| struct clk_fractional_divider *fd = to_clk_fd(hw); | |
| unsigned long m, n; | |
| u64 ret; | |
| if (!req->rate || (!clk_hw_can_set_rate_parent(hw) && req->rate >= req->best_parent_rate)) { | |
| req->rate = req->best_parent_rate; | |
| return 0; | |
| } | |
| if (fd->approximation) | |
| fd->approximation(hw, req->rate, &req->best_parent_rate, &m, &n); | |
| else | |
| clk_fractional_divider_general_approximation(hw, req->rate, | |
| &req->best_parent_rate, | |
| &m, &n); | |
| ret = (u64)req->best_parent_rate * m; | |
| do_div(ret, n); | |
| req->rate = ret; | |
| return 0; | |
| } | |
| static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate, | |
| unsigned long parent_rate) | |
| { | |
| struct clk_fractional_divider *fd = to_clk_fd(hw); | |
| unsigned long flags = 0; | |
| unsigned long m, n, max_m, max_n; | |
| u32 mmask, nmask; | |
| u32 val; | |
| if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) { | |
| max_m = BIT(fd->mwidth); | |
| max_n = BIT(fd->nwidth); | |
| } else { | |
| max_m = GENMASK(fd->mwidth - 1, 0); | |
| max_n = GENMASK(fd->nwidth - 1, 0); | |
| } | |
| rational_best_approximation(rate, parent_rate, max_m, max_n, &m, &n); | |
| if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) { | |
| m--; | |
| n--; | |
| } | |
| mmask = GENMASK(fd->mwidth - 1, 0) << fd->mshift; | |
| nmask = GENMASK(fd->nwidth - 1, 0) << fd->nshift; | |
| if (fd->lock) | |
| spin_lock_irqsave(fd->lock, flags); | |
| else | |
| __acquire(fd->lock); | |
| val = clk_fd_readl(fd); | |
| val &= ~(mmask | nmask); | |
| val |= (m << fd->mshift) | (n << fd->nshift); | |
| clk_fd_writel(fd, val); | |
| if (fd->lock) | |
| spin_unlock_irqrestore(fd->lock, flags); | |
| else | |
| __release(fd->lock); | |
| return 0; | |
| } | |
| #ifdef CONFIG_DEBUG_FS | |
| static int clk_fd_numerator_get(void *hw, u64 *val) | |
| { | |
| struct u32_fract fract; | |
| clk_fd_get_div(hw, &fract); | |
| *val = fract.numerator; | |
| return 0; | |
| } | |
| DEFINE_DEBUGFS_ATTRIBUTE(clk_fd_numerator_fops, clk_fd_numerator_get, NULL, "%llu\n"); | |
| static int clk_fd_denominator_get(void *hw, u64 *val) | |
| { | |
| struct u32_fract fract; | |
| clk_fd_get_div(hw, &fract); | |
| *val = fract.denominator; | |
| return 0; | |
| } | |
| DEFINE_DEBUGFS_ATTRIBUTE(clk_fd_denominator_fops, clk_fd_denominator_get, NULL, "%llu\n"); | |
| static void clk_fd_debug_init(struct clk_hw *hw, struct dentry *dentry) | |
| { | |
| debugfs_create_file("numerator", 0444, dentry, hw, &clk_fd_numerator_fops); | |
| debugfs_create_file("denominator", 0444, dentry, hw, &clk_fd_denominator_fops); | |
| } | |
| #endif | |
| const struct clk_ops clk_fractional_divider_ops = { | |
| .recalc_rate = clk_fd_recalc_rate, | |
| .determine_rate = clk_fd_determine_rate, | |
| .set_rate = clk_fd_set_rate, | |
| #ifdef CONFIG_DEBUG_FS | |
| .debug_init = clk_fd_debug_init, | |
| #endif | |
| }; | |
| EXPORT_SYMBOL_GPL(clk_fractional_divider_ops); | |
| struct clk_hw *clk_hw_register_fractional_divider(struct device *dev, | |
| const char *name, const char *parent_name, unsigned long flags, | |
| void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, | |
| u8 clk_divider_flags, spinlock_t *lock) | |
| { | |
| struct clk_fractional_divider *fd; | |
| struct clk_init_data init; | |
| struct clk_hw *hw; | |
| int ret; | |
| fd = kzalloc_obj(*fd); | |
| if (!fd) | |
| return ERR_PTR(-ENOMEM); | |
| init.name = name; | |
| init.ops = &clk_fractional_divider_ops; | |
| init.flags = flags; | |
| init.parent_names = parent_name ? &parent_name : NULL; | |
| init.num_parents = parent_name ? 1 : 0; | |
| fd->reg = reg; | |
| fd->mshift = mshift; | |
| fd->mwidth = mwidth; | |
| fd->nshift = nshift; | |
| fd->nwidth = nwidth; | |
| fd->flags = clk_divider_flags; | |
| fd->lock = lock; | |
| fd->hw.init = &init; | |
| hw = &fd->hw; | |
| ret = clk_hw_register(dev, hw); | |
| if (ret) { | |
| kfree(fd); | |
| hw = ERR_PTR(ret); | |
| } | |
| return hw; | |
| } | |
| EXPORT_SYMBOL_GPL(clk_hw_register_fractional_divider); | |
| struct clk *clk_register_fractional_divider(struct device *dev, | |
| const char *name, const char *parent_name, unsigned long flags, | |
| void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, | |
| u8 clk_divider_flags, spinlock_t *lock) | |
| { | |
| struct clk_hw *hw; | |
| hw = clk_hw_register_fractional_divider(dev, name, parent_name, flags, | |
| reg, mshift, mwidth, nshift, nwidth, clk_divider_flags, | |
| lock); | |
| if (IS_ERR(hw)) | |
| return ERR_CAST(hw); | |
| return hw->clk; | |
| } | |
| EXPORT_SYMBOL_GPL(clk_register_fractional_divider); | |
| void clk_hw_unregister_fractional_divider(struct clk_hw *hw) | |
| { | |
| struct clk_fractional_divider *fd; | |
| fd = to_clk_fd(hw); | |
| clk_hw_unregister(hw); | |
| kfree(fd); | |
| } |