| /* | |
| * Allwinner A23 SoCs pinctrl driver. | |
| * | |
| * Copyright (C) 2014 Chen-Yu Tsai | |
| * | |
| * Chen-Yu Tsai <wens@csie.org> | |
| * | |
| * Copyright (C) 2014 Maxime Ripard | |
| * | |
| * Maxime Ripard <maxime.ripard@free-electrons.com> | |
| * | |
| * This file is licensed under the terms of the GNU General Public | |
| * License version 2. This program is licensed "as is" without any | |
| * warranty of any kind, whether express or implied. | |
| */ | |
| #include <linux/init.h> | |
| #include <linux/platform_device.h> | |
| #include <linux/of.h> | |
| #include <linux/pinctrl/pinctrl.h> | |
| #include "pinctrl-sunxi.h" | |
| static const struct sunxi_desc_pin sun8i_a23_pins[] = { | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "spi1"), /* CS */ | |
| SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)), /* PA_EINT0 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "spi1"), /* CLK */ | |
| SUNXI_FUNCTION(0x3, "jtag"), /* CKO */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)), /* PA_EINT1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */ | |
| SUNXI_FUNCTION(0x3, "jtag"), /* DOO */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)), /* PA_EINT2 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "spi1"), /* MISO */ | |
| SUNXI_FUNCTION(0x3, "jtag"), /* DIO */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)), /* PA_EINT3 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart4"), /* TX */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)), /* PA_EINT4 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart4"), /* RX */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)), /* PA_EINT5 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart4"), /* RTS */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)), /* PA_EINT6 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart4"), /* CTS */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)), /* PA_EINT7 */ | |
| /* Hole */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart2"), /* TX */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 0)), /* PB_EINT0 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart2"), /* RX */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 1)), /* PB_EINT1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart2"), /* RTS */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 2)), /* PB_EINT2 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart2"), /* CTS */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 3)), /* PB_EINT3 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2s0"), /* SYNC */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 4)), /* PB_EINT4 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2s0"), /* DOUT */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 5)), /* PB_EINT5 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2s0"), /* DIN */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 6)), /* PB_EINT6 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x3, "i2s0"), /* DI */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 7)), /* PB_EINT7 */ | |
| /* Hole */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* WE */ | |
| SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* ALE */ | |
| SUNXI_FUNCTION(0x3, "spi0")), /* MISO */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* CLE */ | |
| SUNXI_FUNCTION(0x3, "spi0")), /* CLK */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */ | |
| SUNXI_FUNCTION(0x3, "spi0")), /* CS */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* RE */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0")), /* RB1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0"), /* DQS */ | |
| SUNXI_FUNCTION(0x3, "mmc2")), /* RST */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */ | |
| /* Hole */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D0 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */ | |
| SUNXI_FUNCTION(0x3, "mmc1")), /* CLK */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */ | |
| SUNXI_FUNCTION(0x3, "mmc1")), /* CMD */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */ | |
| SUNXI_FUNCTION(0x3, "mmc1")), /* D0 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */ | |
| SUNXI_FUNCTION(0x3, "mmc1")), /* D1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */ | |
| SUNXI_FUNCTION(0x3, "mmc1")), /* D2 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */ | |
| SUNXI_FUNCTION(0x3, "mmc1")), /* D3 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */ | |
| SUNXI_FUNCTION(0x3, "uart3")), /* TX */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */ | |
| SUNXI_FUNCTION(0x3, "uart3")), /* RX */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */ | |
| SUNXI_FUNCTION(0x3, "uart1")), /* TX */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */ | |
| SUNXI_FUNCTION(0x3, "uart1")), /* RX */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */ | |
| SUNXI_FUNCTION(0x3, "uart1")), /* RTS */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ | |
| SUNXI_FUNCTION(0x3, "uart1")), /* CTS */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ | |
| SUNXI_FUNCTION(0x3, "i2s1")), /* SYNC */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ | |
| SUNXI_FUNCTION(0x3, "i2s1")), /* CLK */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */ | |
| SUNXI_FUNCTION(0x3, "i2s1")), /* DOUT */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */ | |
| SUNXI_FUNCTION(0x3, "i2s1")), /* DIN */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ | |
| SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ | |
| SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ | |
| SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ | |
| SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ | |
| SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ | |
| SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ | |
| SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ | |
| SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */ | |
| SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */ | |
| SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */ | |
| /* Hole */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* PCLK */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* MCLK */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* HSYNC */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* VSYNC */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* D0 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* D1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* D2 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* D3 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* D4 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* D5 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* D6 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi")), /* D7 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi"), /* SCK */ | |
| SUNXI_FUNCTION(0x3, "i2c2")), /* SCK */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "csi"), /* SDA */ | |
| SUNXI_FUNCTION(0x3, "i2c2")), /* SDA */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out")), | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out")), | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out")), | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out")), | |
| /* Hole */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ | |
| SUNXI_FUNCTION(0x3, "jtag")), /* MS1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ | |
| SUNXI_FUNCTION(0x3, "jtag")), /* DI1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ | |
| SUNXI_FUNCTION(0x3, "uart0")), /* TX */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ | |
| SUNXI_FUNCTION(0x3, "jtag")), /* DO1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ | |
| SUNXI_FUNCTION(0x3, "uart0")), /* RX */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ | |
| SUNXI_FUNCTION(0x3, "jtag")), /* CK1 */ | |
| /* Hole */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 0)), /* PG_EINT0 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 1)), /* PG_EINT1 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 2)), /* PG_EINT2 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 3)), /* PG_EINT3 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 4)), /* PG_EINT4 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 5)), /* PG_EINT5 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart1"), /* TX */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 6)), /* PG_EINT6 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart1"), /* RX */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 7)), /* PG_EINT7 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart1"), /* RTS */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 8)), /* PG_EINT8 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "uart1"), /* CTS */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 9)), /* PG_EINT9 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2s1"), /* SYNC */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 10)), /* PG_EINT10 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2s1"), /* CLK */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 11)), /* PG_EINT11 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2s1"), /* DOUT */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 12)), /* PG_EINT12 */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2s1"), /* DIN */ | |
| SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 13)), /* PG_EINT13 */ | |
| /* Hole */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "pwm0")), | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "pwm1")), | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "spi0"), /* CS */ | |
| SUNXI_FUNCTION(0x3, "uart3")), /* TX */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "spi0"), /* CLK */ | |
| SUNXI_FUNCTION(0x3, "uart3")), /* RX */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "spi0"), /* DOUT */ | |
| SUNXI_FUNCTION(0x3, "uart3")), /* RTS */ | |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9), | |
| SUNXI_FUNCTION(0x0, "gpio_in"), | |
| SUNXI_FUNCTION(0x1, "gpio_out"), | |
| SUNXI_FUNCTION(0x2, "spi0"), /* DIN */ | |
| SUNXI_FUNCTION(0x3, "uart3")), /* CTS */ | |
| }; | |
| static const struct sunxi_pinctrl_desc sun8i_a23_pinctrl_data = { | |
| .pins = sun8i_a23_pins, | |
| .npins = ARRAY_SIZE(sun8i_a23_pins), | |
| .irq_banks = 3, | |
| .disable_strict_mode = true, | |
| }; | |
| static int sun8i_a23_pinctrl_probe(struct platform_device *pdev) | |
| { | |
| return sunxi_pinctrl_init(pdev, | |
| &sun8i_a23_pinctrl_data); | |
| } | |
| static const struct of_device_id sun8i_a23_pinctrl_match[] = { | |
| { .compatible = "allwinner,sun8i-a23-pinctrl", }, | |
| {} | |
| }; | |
| static struct platform_driver sun8i_a23_pinctrl_driver = { | |
| .probe = sun8i_a23_pinctrl_probe, | |
| .driver = { | |
| .name = "sun8i-a23-pinctrl", | |
| .of_match_table = sun8i_a23_pinctrl_match, | |
| }, | |
| }; | |
| builtin_platform_driver(sun8i_a23_pinctrl_driver); |