| # SPDX-License-Identifier: GPL-2.0-only | |
| menu "Clock support for Amlogic platforms" | |
| depends on ARCH_MESON || COMPILE_TEST | |
| config COMMON_CLK_MESON_REGMAP | |
| tristate | |
| select REGMAP | |
| select MFD_SYSCON | |
| config COMMON_CLK_MESON_DUALDIV | |
| tristate | |
| select COMMON_CLK_MESON_REGMAP | |
| config COMMON_CLK_MESON_MPLL | |
| tristate | |
| select COMMON_CLK_MESON_REGMAP | |
| config COMMON_CLK_MESON_PHASE | |
| tristate | |
| select COMMON_CLK_MESON_REGMAP | |
| config COMMON_CLK_MESON_PLL | |
| tristate | |
| select COMMON_CLK_MESON_REGMAP | |
| config COMMON_CLK_MESON_SCLK_DIV | |
| tristate | |
| select COMMON_CLK_MESON_REGMAP | |
| config COMMON_CLK_MESON_VID_PLL_DIV | |
| tristate | |
| select COMMON_CLK_MESON_REGMAP | |
| config COMMON_CLK_MESON_VCLK | |
| tristate | |
| select COMMON_CLK_MESON_REGMAP | |
| config COMMON_CLK_MESON_CLKC_UTILS | |
| select REGMAP | |
| select MFD_SYSCON | |
| tristate | |
| config COMMON_CLK_MESON_AO_CLKC | |
| tristate | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select RESET_CONTROLLER | |
| config COMMON_CLK_MESON_CPU_DYNDIV | |
| tristate | |
| select COMMON_CLK_MESON_REGMAP | |
| config COMMON_CLK_MESON8B | |
| bool "Meson8 SoC Clock controller support" | |
| depends on ARM | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_MPLL | |
| select COMMON_CLK_MESON_PLL | |
| select MFD_SYSCON | |
| select RESET_CONTROLLER | |
| help | |
| Support for the clock controller on AmLogic S802 (Meson8), | |
| S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you | |
| want peripherals and CPU frequency scaling to work. | |
| config COMMON_CLK_GXBB | |
| tristate "GXBB and GXL SoC clock controllers support" | |
| depends on ARM64 | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_DUALDIV | |
| select COMMON_CLK_MESON_VID_PLL_DIV | |
| select COMMON_CLK_MESON_MPLL | |
| select COMMON_CLK_MESON_PLL | |
| select COMMON_CLK_MESON_AO_CLKC | |
| select MFD_SYSCON | |
| help | |
| Support for the clock controller on AmLogic S905 devices, aka gxbb. | |
| Say Y if you want peripherals and CPU frequency scaling to work. | |
| config COMMON_CLK_AXG | |
| tristate "AXG SoC clock controllers support" | |
| depends on ARM64 | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_DUALDIV | |
| select COMMON_CLK_MESON_MPLL | |
| select COMMON_CLK_MESON_PLL | |
| select COMMON_CLK_MESON_AO_CLKC | |
| select MFD_SYSCON | |
| help | |
| Support for the clock controller on AmLogic A113D devices, aka axg. | |
| Say Y if you want peripherals and CPU frequency scaling to work. | |
| config COMMON_CLK_AXG_AUDIO | |
| tristate "Meson AXG Audio Clock Controller Driver" | |
| depends on ARM64 | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_PHASE | |
| select COMMON_CLK_MESON_SCLK_DIV | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select REGMAP_MMIO | |
| select AUXILIARY_BUS | |
| imply RESET_MESON_AUX | |
| help | |
| Support for the audio clock controller on AmLogic A113D devices, | |
| aka axg, Say Y if you want audio subsystem to work. | |
| config COMMON_CLK_A1_PLL | |
| tristate "Amlogic A1 SoC PLL controller support" | |
| depends on ARM64 | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_PLL | |
| help | |
| Support for the PLL clock controller on Amlogic A113L based | |
| device, A1 SoC Family. Say Y if you want A1 PLL clock controller | |
| to work. | |
| config COMMON_CLK_A1_PERIPHERALS | |
| tristate "Amlogic A1 SoC Peripherals clock controller support" | |
| depends on ARM64 | |
| select COMMON_CLK_MESON_DUALDIV | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| help | |
| Support for the Peripherals clock controller on Amlogic A113L based | |
| device, A1 SoC Family. Say Y if you want A1 Peripherals clock | |
| controller to work. | |
| config COMMON_CLK_A9_PERIPHERALS | |
| tristate "Amlogic A9 SoC peripherals clock controller support" | |
| depends on ARM64 || COMPILE_TEST | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_DUALDIV | |
| select COMMON_CLK_MESON_VID_PLL_DIV | |
| imply COMMON_CLK_SCMI | |
| help | |
| Support for the peripherals clock controller on Amlogic A311Y3 based | |
| device, AKA A9. Peripherals are required by most peripheral to operate. | |
| Say Y if you want A9 peripherals clock controller to work. | |
| config COMMON_CLK_A9_AO | |
| tristate "Amlogic A9 SoC AO clock controller support" | |
| depends on ARM64 || COMPILE_TEST | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_DUALDIV | |
| imply COMMON_CLK_SCMI | |
| help | |
| Support for the AO clock controller on Amlogic A311Y3 based | |
| device, AKA A9. | |
| Say Y if you want A9 AO clock controller to work. | |
| config COMMON_CLK_C3_PLL | |
| tristate "Amlogic C3 PLL clock controller" | |
| depends on ARM64 | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_PLL | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| imply COMMON_CLK_SCMI | |
| help | |
| Support for the PLL clock controller on Amlogic C302X and C308L devices, | |
| AKA C3. Say Y if you want the board to work, because PLLs are the parent | |
| of most peripherals. | |
| config COMMON_CLK_C3_PERIPHERALS | |
| tristate "Amlogic C3 peripherals clock controller" | |
| depends on ARM64 | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_DUALDIV | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| imply COMMON_CLK_SCMI | |
| imply COMMON_CLK_C3_PLL | |
| help | |
| Support for the Peripherals clock controller on Amlogic C302X and | |
| C308L devices, AKA C3. Say Y if you want the peripherals clock to | |
| work. | |
| config COMMON_CLK_G12A | |
| tristate "G12 and SM1 SoC clock controllers support" | |
| depends on ARM64 | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_DUALDIV | |
| select COMMON_CLK_MESON_MPLL | |
| select COMMON_CLK_MESON_PLL | |
| select COMMON_CLK_MESON_AO_CLKC | |
| select COMMON_CLK_MESON_CPU_DYNDIV | |
| select COMMON_CLK_MESON_VID_PLL_DIV | |
| select COMMON_CLK_MESON_VCLK | |
| select MFD_SYSCON | |
| help | |
| Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 | |
| devices, aka g12a. Say Y if you want peripherals to work. | |
| config COMMON_CLK_S4_PLL | |
| tristate "S4 SoC PLL clock controllers support" | |
| depends on ARM64 | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_MPLL | |
| select COMMON_CLK_MESON_PLL | |
| select COMMON_CLK_MESON_REGMAP | |
| help | |
| Support for the PLL clock controller on Amlogic S805X2 and S905Y4 devices, | |
| AKA S4. Say Y if you want the board to work, because PLLs are the parent of | |
| most peripherals. | |
| config COMMON_CLK_S4_PERIPHERALS | |
| tristate "S4 SoC peripherals clock controllers support" | |
| depends on ARM64 | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_DUALDIV | |
| select COMMON_CLK_MESON_VID_PLL_DIV | |
| help | |
| Support for the peripherals clock controller on Amlogic S805X2 and S905Y4 | |
| devices, AKA S4. Say Y if you want S4 peripherals clock controller to work. | |
| config COMMON_CLK_T7_PLL | |
| tristate "Amlogic T7 SoC PLL controller support" | |
| depends on ARM64 | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_MPLL | |
| select COMMON_CLK_MESON_PLL | |
| imply COMMON_CLK_SCMI | |
| help | |
| Support for the PLL clock controller on Amlogic A311D2 based | |
| device, AKA T7. PLLs are required by most peripheral to operate. | |
| Say Y if you want T7 PLL clock controller to work. | |
| config COMMON_CLK_T7_PERIPHERALS | |
| tristate "Amlogic T7 SoC peripherals clock controller support" | |
| depends on ARM64 | |
| default ARCH_MESON | |
| select COMMON_CLK_MESON_REGMAP | |
| select COMMON_CLK_MESON_CLKC_UTILS | |
| select COMMON_CLK_MESON_DUALDIV | |
| imply COMMON_CLK_SCMI | |
| imply COMMON_CLK_T7_PLL | |
| help | |
| Support for the peripherals clock controller on Amlogic A311D2 based | |
| device, AKA T7. Peripherals are required by most peripheral to operate. | |
| Say Y if you want T7 peripherals clock controller to work. | |
| endmenu |