Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 2 | /* |
| 3 | * This file contains the routines for handling the MMU on those |
| 4 | * PowerPC implementations where the MMU substantially follows the |
| 5 | * architecture specification. This includes the 6xx, 7xx, 7xxx, |
Michael Ellerman | 0f36910 | 2014-07-10 12:29:24 +1000 | [diff] [blame] | 6 | * and 8260 implementations but excludes the 8xx and 4xx. |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 7 | * -- paulus |
| 8 | * |
| 9 | * Derived from arch/ppc/mm/init.c: |
| 10 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
| 11 | * |
| 12 | * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) |
| 13 | * and Cort Dougan (PReP) (cort@cs.nmt.edu) |
| 14 | * Copyright (C) 1996 Paul Mackerras |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 15 | * |
| 16 | * Derived from "arch/i386/mm/init.c" |
| 17 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 18 | */ |
| 19 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 20 | #include <linux/kernel.h> |
| 21 | #include <linux/mm.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/highmem.h> |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 24 | #include <linux/memblock.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 25 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 26 | #include <asm/mmu.h> |
| 27 | #include <asm/machdep.h> |
Christophe Leroy | 9efc74f | 2018-11-09 17:33:24 +0000 | [diff] [blame] | 28 | #include <asm/code-patching.h> |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 29 | #include <asm/sections.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 30 | |
Christophe Leroy | 9d9f2cc | 2019-03-29 09:59:59 +0000 | [diff] [blame] | 31 | #include <mm/mmu_decl.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 32 | |
Christophe Leroy | 69a1593 | 2020-10-01 15:35:38 +0000 | [diff] [blame] | 33 | u8 __initdata early_hash[SZ_256K] __aligned(SZ_256K) = {0}; |
| 34 | |
Christophe Leroy | 6e980b5 | 2020-10-22 06:29:32 +0000 | [diff] [blame] | 35 | static struct hash_pte __initdata *Hash = (struct hash_pte *)early_hash; |
| 36 | static unsigned long __initdata Hash_size, Hash_mask; |
| 37 | static unsigned int __initdata hash_mb, hash_mb2; |
| 38 | unsigned long __initdata _SDR1; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 39 | |
Becky Bruce | 316a405 | 2008-06-14 09:41:43 +1000 | [diff] [blame] | 40 | struct ppc_bat BATS[8][2]; /* 8 pairs of IBAT, DBAT */ |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 41 | |
Christophe Leroy | 03d5b19 | 2020-10-22 06:29:29 +0000 | [diff] [blame] | 42 | static struct batrange { /* stores address ranges mapped by BATs */ |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 43 | unsigned long start; |
| 44 | unsigned long limit; |
Becky Bruce | 7c5c432 | 2008-06-14 09:41:42 +1000 | [diff] [blame] | 45 | phys_addr_t phys; |
Jon Loeliger | ee0339f | 2006-06-17 17:52:44 -0500 | [diff] [blame] | 46 | } bat_addrs[8]; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 47 | |
Christophe Leroy | f265512 | 2020-10-22 06:29:35 +0000 | [diff] [blame] | 48 | #ifdef CONFIG_SMP |
| 49 | unsigned long mmu_hash_lock; |
| 50 | #endif |
| 51 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 52 | /* |
| 53 | * Return PA for this VA if it is mapped by a BAT, or 0 |
| 54 | */ |
Christophe Leroy | 3084cdb | 2016-02-09 17:07:58 +0100 | [diff] [blame] | 55 | phys_addr_t v_block_mapped(unsigned long va) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 56 | { |
| 57 | int b; |
Christophe Leroy | e93ba1b | 2018-11-16 17:27:42 +0000 | [diff] [blame] | 58 | for (b = 0; b < ARRAY_SIZE(bat_addrs); ++b) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 59 | if (va >= bat_addrs[b].start && va < bat_addrs[b].limit) |
| 60 | return bat_addrs[b].phys + (va - bat_addrs[b].start); |
| 61 | return 0; |
| 62 | } |
| 63 | |
| 64 | /* |
| 65 | * Return VA for a given PA or 0 if not mapped |
| 66 | */ |
Christophe Leroy | 3084cdb | 2016-02-09 17:07:58 +0100 | [diff] [blame] | 67 | unsigned long p_block_mapped(phys_addr_t pa) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 68 | { |
| 69 | int b; |
Christophe Leroy | e93ba1b | 2018-11-16 17:27:42 +0000 | [diff] [blame] | 70 | for (b = 0; b < ARRAY_SIZE(bat_addrs); ++b) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 71 | if (pa >= bat_addrs[b].phys |
| 72 | && pa < (bat_addrs[b].limit-bat_addrs[b].start) |
| 73 | +bat_addrs[b].phys) |
| 74 | return bat_addrs[b].start+(pa-bat_addrs[b].phys); |
| 75 | return 0; |
| 76 | } |
| 77 | |
Christophe Leroy | d37823c | 2022-01-10 15:29:25 +0000 | [diff] [blame] | 78 | int __init find_free_bat(void) |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 79 | { |
| 80 | int b; |
Christophe Leroy | 2e38ea4 | 2020-09-29 06:48:37 +0000 | [diff] [blame] | 81 | int n = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4; |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 82 | |
Christophe Leroy | 2e38ea4 | 2020-09-29 06:48:37 +0000 | [diff] [blame] | 83 | for (b = 0; b < n; b++) { |
| 84 | struct ppc_bat *bat = BATS[b]; |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 85 | |
Christophe Leroy | 2e38ea4 | 2020-09-29 06:48:37 +0000 | [diff] [blame] | 86 | if (!(bat[1].batu & 3)) |
| 87 | return b; |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 88 | } |
| 89 | return -1; |
| 90 | } |
| 91 | |
Christophe Leroy | 12f3635 | 2019-04-30 16:11:59 +0000 | [diff] [blame] | 92 | /* |
| 93 | * This function calculates the size of the larger block usable to map the |
| 94 | * beginning of an area based on the start address and size of that area: |
Christophe Leroy | 8b14e1d | 2020-09-29 06:48:36 +0000 | [diff] [blame] | 95 | * - max block size is 256 on 6xx. |
Christophe Leroy | 12f3635 | 2019-04-30 16:11:59 +0000 | [diff] [blame] | 96 | * - base address must be aligned to the block size. So the maximum block size |
| 97 | * is identified by the lowest bit set to 1 in the base address (for instance |
| 98 | * if base is 0x16000000, max size is 0x02000000). |
| 99 | * - block size has to be a power of two. This is calculated by finding the |
| 100 | * highest bit set to 1. |
| 101 | */ |
Christophe Leroy | d37823c | 2022-01-10 15:29:25 +0000 | [diff] [blame] | 102 | unsigned int bat_block_size(unsigned long base, unsigned long top) |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 103 | { |
Christophe Leroy | 8b14e1d | 2020-09-29 06:48:36 +0000 | [diff] [blame] | 104 | unsigned int max_size = SZ_256M; |
Christophe Leroy | 12f3635 | 2019-04-30 16:11:59 +0000 | [diff] [blame] | 105 | unsigned int base_shift = (ffs(base) - 1) & 31; |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 106 | unsigned int block_shift = (fls(top - base) - 1) & 31; |
| 107 | |
| 108 | return min3(max_size, 1U << base_shift, 1U << block_shift); |
| 109 | } |
| 110 | |
Christophe Leroy | 5e04ae8 | 2019-02-21 19:08:48 +0000 | [diff] [blame] | 111 | /* |
| 112 | * Set up one of the IBAT (block address translation) register pairs. |
| 113 | * The parameters are not checked; in particular size must be a power |
| 114 | * of 2 between 128k and 256M. |
Christophe Leroy | 5e04ae8 | 2019-02-21 19:08:48 +0000 | [diff] [blame] | 115 | */ |
| 116 | static void setibat(int index, unsigned long virt, phys_addr_t phys, |
| 117 | unsigned int size, pgprot_t prot) |
| 118 | { |
| 119 | unsigned int bl = (size >> 17) - 1; |
| 120 | int wimgxpp; |
| 121 | struct ppc_bat *bat = BATS[index]; |
| 122 | unsigned long flags = pgprot_val(prot); |
| 123 | |
| 124 | if (!cpu_has_feature(CPU_FTR_NEED_COHERENT)) |
| 125 | flags &= ~_PAGE_COHERENT; |
| 126 | |
| 127 | wimgxpp = (flags & _PAGE_COHERENT) | (_PAGE_EXEC ? BPP_RX : BPP_XX); |
| 128 | bat[0].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */ |
| 129 | bat[0].batl = BAT_PHYS_ADDR(phys) | wimgxpp; |
| 130 | if (flags & _PAGE_USER) |
| 131 | bat[0].batu |= 1; /* Vp = 1 */ |
| 132 | } |
| 133 | |
| 134 | static void clearibat(int index) |
| 135 | { |
| 136 | struct ppc_bat *bat = BATS[index]; |
| 137 | |
| 138 | bat[0].batu = 0; |
| 139 | bat[0].batl = 0; |
| 140 | } |
| 141 | |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 142 | static unsigned long __init __mmu_mapin_ram(unsigned long base, unsigned long top) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 143 | { |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 144 | int idx; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 145 | |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 146 | while ((idx = find_free_bat()) != -1 && base != top) { |
Christophe Leroy | d37823c | 2022-01-10 15:29:25 +0000 | [diff] [blame] | 147 | unsigned int size = bat_block_size(base, top); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 148 | |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 149 | if (size < 128 << 10) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 150 | break; |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 151 | setbat(idx, PAGE_OFFSET + base, base, size, PAGE_KERNEL_X); |
| 152 | base += size; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 153 | } |
| 154 | |
Christophe Leroy | e4d6654 | 2019-02-21 19:08:39 +0000 | [diff] [blame] | 155 | return base; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 156 | } |
| 157 | |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 158 | unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top) |
| 159 | { |
Christophe Leroy | 12f3635 | 2019-04-30 16:11:59 +0000 | [diff] [blame] | 160 | unsigned long done; |
Michael Ellerman | b150a4d | 2022-09-16 14:41:24 +1000 | [diff] [blame] | 161 | unsigned long border = (unsigned long)__srwx_boundary - PAGE_OFFSET; |
Christophe Leroy | 2a0fb3c | 2022-06-14 12:34:09 +0200 | [diff] [blame] | 162 | unsigned long size; |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 163 | |
Christophe Leroy | 2a0fb3c | 2022-06-14 12:34:09 +0200 | [diff] [blame] | 164 | size = roundup_pow_of_two((unsigned long)_einittext - PAGE_OFFSET); |
| 165 | setibat(0, PAGE_OFFSET, 0, size, PAGE_KERNEL_X); |
Christophe Leroy | 035b19a | 2020-11-25 07:10:46 +0000 | [diff] [blame] | 166 | |
Christophe Leroy | 1ce8449 | 2022-06-14 12:32:23 +0200 | [diff] [blame] | 167 | if (debug_pagealloc_enabled_or_kfence()) { |
Christophe Leroy | 035b19a | 2020-11-25 07:10:46 +0000 | [diff] [blame] | 168 | pr_debug_once("Read-Write memory mapped without BATs\n"); |
Christophe Leroy | 2b279c0 | 2020-05-19 05:49:28 +0000 | [diff] [blame] | 169 | if (base >= border) |
| 170 | return base; |
| 171 | if (top >= border) |
| 172 | top = border; |
| 173 | } |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 174 | |
| 175 | if (!strict_kernel_rwx_enabled() || base >= border || top <= border) |
| 176 | return __mmu_mapin_ram(base, top); |
| 177 | |
| 178 | done = __mmu_mapin_ram(base, border); |
Christophe Leroy | 12f3635 | 2019-04-30 16:11:59 +0000 | [diff] [blame] | 179 | if (done != border) |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 180 | return done; |
| 181 | |
Christophe Leroy | 12f3635 | 2019-04-30 16:11:59 +0000 | [diff] [blame] | 182 | return __mmu_mapin_ram(border, top); |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 183 | } |
| 184 | |
Christophe Leroy | c496433 | 2020-06-29 11:15:22 +0000 | [diff] [blame] | 185 | static bool is_module_segment(unsigned long addr) |
| 186 | { |
| 187 | if (!IS_ENABLED(CONFIG_MODULES)) |
| 188 | return false; |
Christophe Leroy | 7bee31a | 2020-08-05 15:27:28 +0000 | [diff] [blame] | 189 | if (addr < ALIGN_DOWN(MODULES_VADDR, SZ_256M)) |
| 190 | return false; |
Christophe Leroy | 541cebb | 2020-08-21 07:15:25 +0000 | [diff] [blame] | 191 | if (addr > ALIGN(MODULES_END, SZ_256M) - 1) |
Christophe Leroy | 7bee31a | 2020-08-05 15:27:28 +0000 | [diff] [blame] | 192 | return false; |
Christophe Leroy | c496433 | 2020-06-29 11:15:22 +0000 | [diff] [blame] | 193 | return true; |
| 194 | } |
| 195 | |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 196 | void mmu_mark_initmem_nx(void) |
| 197 | { |
| 198 | int nb = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4; |
| 199 | int i; |
| 200 | unsigned long base = (unsigned long)_stext - PAGE_OFFSET; |
Christophe Leroy | 37eb7ca | 2021-11-26 13:40:35 +0100 | [diff] [blame] | 201 | unsigned long top = ALIGN((unsigned long)_etext - PAGE_OFFSET, SZ_128K); |
Christophe Leroy | 4b19f96 | 2020-05-19 05:48:56 +0000 | [diff] [blame] | 202 | unsigned long border = (unsigned long)__init_begin - PAGE_OFFSET; |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 203 | unsigned long size; |
| 204 | |
Christophe Leroy | 37eb7ca | 2021-11-26 13:40:35 +0100 | [diff] [blame] | 205 | for (i = 0; i < nb - 1 && base < top;) { |
Christophe Leroy | d37823c | 2022-01-10 15:29:25 +0000 | [diff] [blame] | 206 | size = bat_block_size(base, top); |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 207 | setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT); |
| 208 | base += size; |
| 209 | } |
| 210 | if (base < top) { |
Christophe Leroy | d37823c | 2022-01-10 15:29:25 +0000 | [diff] [blame] | 211 | size = bat_block_size(base, top); |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 212 | if ((top - base) > size) { |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 213 | size <<= 1; |
Christophe Leroy | 4b19f96 | 2020-05-19 05:48:56 +0000 | [diff] [blame] | 214 | if (strict_kernel_rwx_enabled() && base + size > border) |
| 215 | pr_warn("Some RW data is getting mapped X. " |
| 216 | "Adjust CONFIG_DATA_SHIFT to avoid that.\n"); |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 217 | } |
| 218 | setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT); |
| 219 | base += size; |
| 220 | } |
| 221 | for (; i < nb; i++) |
| 222 | clearibat(i); |
| 223 | |
| 224 | update_bats(); |
| 225 | |
| 226 | for (i = TASK_SIZE >> 28; i < 16; i++) { |
| 227 | /* Do not set NX on VM space for modules */ |
Christophe Leroy | c496433 | 2020-06-29 11:15:22 +0000 | [diff] [blame] | 228 | if (is_module_segment(i << 28)) |
| 229 | continue; |
| 230 | |
Christophe Leroy | 179ae57 | 2021-02-06 11:47:27 +0000 | [diff] [blame] | 231 | mtsr(mfsr(i << 28) | 0x10000000, i << 28); |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 232 | } |
| 233 | } |
| 234 | |
| 235 | void mmu_mark_rodata_ro(void) |
| 236 | { |
| 237 | int nb = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4; |
| 238 | int i; |
| 239 | |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 240 | for (i = 0; i < nb; i++) { |
| 241 | struct ppc_bat *bat = BATS[i]; |
| 242 | |
Nicholas Piggin | 7082f8e | 2022-09-16 14:07:49 +1000 | [diff] [blame] | 243 | if (bat_addrs[i].start < (unsigned long)__end_rodata) |
Christophe Leroy | 63b2bc6 | 2019-02-21 19:08:49 +0000 | [diff] [blame] | 244 | bat[1].batl = (bat[1].batl & ~BPP_RW) | BPP_RX; |
| 245 | } |
| 246 | |
| 247 | update_bats(); |
| 248 | } |
| 249 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 250 | /* |
Christophe Leroy | 2a0fb3c | 2022-06-14 12:34:09 +0200 | [diff] [blame] | 251 | * Set up one of the D BAT (block address translation) register pairs. |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 252 | * The parameters are not checked; in particular size must be a power |
| 253 | * of 2 between 128k and 256M. |
| 254 | */ |
Becky Bruce | 7c5c432 | 2008-06-14 09:41:42 +1000 | [diff] [blame] | 255 | void __init setbat(int index, unsigned long virt, phys_addr_t phys, |
Michael Ellerman | 5dd4e4f | 2015-03-25 20:11:55 +1100 | [diff] [blame] | 256 | unsigned int size, pgprot_t prot) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 257 | { |
| 258 | unsigned int bl; |
| 259 | int wimgxpp; |
Christophe Leroy | cbcaff7 | 2019-09-16 20:25:39 +0000 | [diff] [blame] | 260 | struct ppc_bat *bat; |
Michael Ellerman | 5dd4e4f | 2015-03-25 20:11:55 +1100 | [diff] [blame] | 261 | unsigned long flags = pgprot_val(prot); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 262 | |
Christophe Leroy | cbcaff7 | 2019-09-16 20:25:39 +0000 | [diff] [blame] | 263 | if (index == -1) |
| 264 | index = find_free_bat(); |
| 265 | if (index == -1) { |
| 266 | pr_err("%s: no BAT available for mapping 0x%llx\n", __func__, |
| 267 | (unsigned long long)phys); |
| 268 | return; |
| 269 | } |
| 270 | bat = BATS[index]; |
| 271 | |
Gerhard Pircher | 4c456a6 | 2009-01-23 06:51:28 +0000 | [diff] [blame] | 272 | if ((flags & _PAGE_NO_CACHE) || |
| 273 | (cpu_has_feature(CPU_FTR_NEED_COHERENT) == 0)) |
| 274 | flags &= ~_PAGE_COHERENT; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 275 | |
| 276 | bl = (size >> 17) - 1; |
Christophe Leroy | 2e38ea4 | 2020-09-29 06:48:37 +0000 | [diff] [blame] | 277 | /* Do DBAT first */ |
| 278 | wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
| 279 | | _PAGE_COHERENT | _PAGE_GUARDED); |
| 280 | wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX; |
| 281 | bat[1].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */ |
| 282 | bat[1].batl = BAT_PHYS_ADDR(phys) | wimgxpp; |
| 283 | if (flags & _PAGE_USER) |
| 284 | bat[1].batu |= 1; /* Vp = 1 */ |
| 285 | if (flags & _PAGE_GUARDED) { |
| 286 | /* G bit must be zero in IBATs */ |
| 287 | flags &= ~_PAGE_EXEC; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 288 | } |
| 289 | |
| 290 | bat_addrs[index].start = virt; |
| 291 | bat_addrs[index].limit = virt + ((bl + 1) << 17) - 1; |
| 292 | bat_addrs[index].phys = phys; |
| 293 | } |
| 294 | |
| 295 | /* |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 296 | * Preload a translation in the hash table |
| 297 | */ |
Christophe Leroy | 79d1bef | 2020-11-25 07:10:47 +0000 | [diff] [blame] | 298 | static void hash_preload(struct mm_struct *mm, unsigned long ea) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 299 | { |
| 300 | pmd_t *pmd; |
| 301 | |
Christophe Leroy | 4cc445b | 2020-10-22 06:29:30 +0000 | [diff] [blame] | 302 | if (!mmu_has_feature(MMU_FTR_HPTE_TABLE)) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 303 | return; |
Mike Rapoport | e05c7b1 | 2020-06-08 21:33:05 -0700 | [diff] [blame] | 304 | pmd = pmd_off(mm, ea); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 305 | if (!pmd_none(*pmd)) |
Paul Mackerras | 6218a76 | 2006-06-11 14:15:17 +1000 | [diff] [blame] | 306 | add_hash_page(mm->context.id, ea, pmd_val(*pmd)); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 307 | } |
| 308 | |
| 309 | /* |
Christophe Leroy | e5a1edb | 2019-08-16 05:41:42 +0000 | [diff] [blame] | 310 | * This is called at the end of handling a user page fault, when the |
| 311 | * fault has been handled by updating a PTE in the linux page tables. |
| 312 | * We use it to preload an HPTE into the hash table corresponding to |
| 313 | * the updated linux PTE. |
| 314 | * |
| 315 | * This must always be called with the pte lock held. |
| 316 | */ |
Christophe Leroy | 73ea68a | 2022-09-05 11:38:25 +0200 | [diff] [blame] | 317 | void __update_mmu_cache(struct vm_area_struct *vma, unsigned long address, |
Christophe Leroy | e5a1edb | 2019-08-16 05:41:42 +0000 | [diff] [blame] | 318 | pte_t *ptep) |
| 319 | { |
| 320 | /* |
| 321 | * We don't need to worry about _PAGE_PRESENT here because we are |
| 322 | * called with either mm->page_table_lock held or ptl lock held |
| 323 | */ |
Christophe Leroy | e5a1edb | 2019-08-16 05:41:42 +0000 | [diff] [blame] | 324 | |
| 325 | /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */ |
| 326 | if (!pte_young(*ptep) || address >= TASK_SIZE) |
| 327 | return; |
| 328 | |
Christophe Leroy | f49f4e2 | 2019-08-16 05:41:43 +0000 | [diff] [blame] | 329 | /* We have to test for regs NULL since init will get here first thing at boot */ |
| 330 | if (!current->thread.regs) |
Christophe Leroy | e5a1edb | 2019-08-16 05:41:42 +0000 | [diff] [blame] | 331 | return; |
Christophe Leroy | e5a1edb | 2019-08-16 05:41:42 +0000 | [diff] [blame] | 332 | |
Christophe Leroy | f49f4e2 | 2019-08-16 05:41:43 +0000 | [diff] [blame] | 333 | /* We also avoid filling the hash if not coming from a fault */ |
| 334 | if (TRAP(current->thread.regs) != 0x300 && TRAP(current->thread.regs) != 0x400) |
| 335 | return; |
| 336 | |
| 337 | hash_preload(vma->vm_mm, address); |
Christophe Leroy | e5a1edb | 2019-08-16 05:41:42 +0000 | [diff] [blame] | 338 | } |
| 339 | |
| 340 | /* |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 341 | * Initialize the hash table and patch the instructions in hashtable.S. |
| 342 | */ |
| 343 | void __init MMU_init_hw(void) |
| 344 | { |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 345 | unsigned int n_hpteg, lg_n_hpteg; |
| 346 | |
Christophe Leroy | 4a3a224 | 2018-11-09 17:33:22 +0000 | [diff] [blame] | 347 | if (!mmu_has_feature(MMU_FTR_HPTE_TABLE)) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 348 | return; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 349 | |
| 350 | if ( ppc_md.progress ) ppc_md.progress("hash:enter", 0x105); |
| 351 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 352 | #define LG_HPTEG_SIZE 6 /* 64 bytes per HPTEG */ |
| 353 | #define SDR1_LOW_BITS ((n_hpteg - 1) >> 10) |
| 354 | #define MIN_N_HPTEG 1024 /* min 64kB hash table */ |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 355 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 356 | /* |
| 357 | * Allow 1 HPTE (1/8 HPTEG) for each page of memory. |
| 358 | * This is less than the recommended amount, but then |
| 359 | * Linux ain't AIX. |
| 360 | */ |
| 361 | n_hpteg = total_memory / (PAGE_SIZE * 8); |
| 362 | if (n_hpteg < MIN_N_HPTEG) |
| 363 | n_hpteg = MIN_N_HPTEG; |
| 364 | lg_n_hpteg = __ilog2(n_hpteg); |
| 365 | if (n_hpteg & (n_hpteg - 1)) { |
| 366 | ++lg_n_hpteg; /* round up if not power of 2 */ |
| 367 | n_hpteg = 1 << lg_n_hpteg; |
| 368 | } |
| 369 | Hash_size = n_hpteg << LG_HPTEG_SIZE; |
| 370 | |
| 371 | /* |
| 372 | * Find some memory for the hash table. |
| 373 | */ |
| 374 | if ( ppc_md.progress ) ppc_md.progress("hash:find piece", 0x322); |
Mike Rapoport | b63a07d | 2019-03-07 16:31:06 -0800 | [diff] [blame] | 375 | Hash = memblock_alloc(Hash_size, Hash_size); |
Mike Rapoport | 8a7f97b | 2019-03-11 23:30:31 -0700 | [diff] [blame] | 376 | if (!Hash) |
| 377 | panic("%s: Failed to allocate %lu bytes align=0x%lx\n", |
| 378 | __func__, Hash_size, Hash_size); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 379 | _SDR1 = __pa(Hash) | SDR1_LOW_BITS; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 380 | |
Christophe Leroy | 8f156c2 | 2019-04-26 16:36:37 +0000 | [diff] [blame] | 381 | pr_info("Total memory = %lldMB; using %ldkB for hash table\n", |
| 382 | (unsigned long long)(total_memory >> 20), Hash_size >> 10); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 383 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 384 | |
Christophe Leroy | 72f208c | 2019-04-26 16:23:35 +0000 | [diff] [blame] | 385 | Hash_mask = n_hpteg - 1; |
| 386 | hash_mb2 = hash_mb = 32 - LG_HPTEG_SIZE - lg_n_hpteg; |
| 387 | if (lg_n_hpteg > 16) |
| 388 | hash_mb2 = 16 - LG_HPTEG_SIZE; |
| 389 | } |
| 390 | |
| 391 | void __init MMU_init_hw_patch(void) |
| 392 | { |
| 393 | unsigned int hmask = Hash_mask >> (16 - LG_HPTEG_SIZE); |
Christophe Leroy | 232ca1e | 2020-02-15 10:14:25 +0000 | [diff] [blame] | 394 | unsigned int hash = (unsigned int)Hash - PAGE_OFFSET; |
Christophe Leroy | 72f208c | 2019-04-26 16:23:35 +0000 | [diff] [blame] | 395 | |
Christophe Leroy | 69a1593 | 2020-10-01 15:35:38 +0000 | [diff] [blame] | 396 | if (!mmu_has_feature(MMU_FTR_HPTE_TABLE)) |
| 397 | return; |
| 398 | |
Christophe Leroy | 72f208c | 2019-04-26 16:23:35 +0000 | [diff] [blame] | 399 | if (ppc_md.progress) |
| 400 | ppc_md.progress("hash:patch", 0x345); |
| 401 | if (ppc_md.progress) |
| 402 | ppc_md.progress("hash:done", 0x205); |
| 403 | |
| 404 | /* WARNING: Make sure nothing can trigger a KASAN check past this point */ |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 405 | |
| 406 | /* |
| 407 | * Patch up the instructions in hashtable.S:create_hpte |
| 408 | */ |
Christophe Leroy | cd08f10 | 2019-12-21 08:32:38 +0000 | [diff] [blame] | 409 | modify_instruction_site(&patch__hash_page_A0, 0xffff, hash >> 16); |
Christophe Leroy | 72f208c | 2019-04-26 16:23:35 +0000 | [diff] [blame] | 410 | modify_instruction_site(&patch__hash_page_A1, 0x7c0, hash_mb << 6); |
| 411 | modify_instruction_site(&patch__hash_page_A2, 0x7c0, hash_mb2 << 6); |
Christophe Leroy | 9efc74f | 2018-11-09 17:33:24 +0000 | [diff] [blame] | 412 | modify_instruction_site(&patch__hash_page_B, 0xffff, hmask); |
| 413 | modify_instruction_site(&patch__hash_page_C, 0xffff, hmask); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 414 | |
| 415 | /* |
| 416 | * Patch up the instructions in hashtable.S:flush_hash_page |
| 417 | */ |
Christophe Leroy | 232ca1e | 2020-02-15 10:14:25 +0000 | [diff] [blame] | 418 | modify_instruction_site(&patch__flush_hash_A0, 0xffff, hash >> 16); |
Christophe Leroy | 72f208c | 2019-04-26 16:23:35 +0000 | [diff] [blame] | 419 | modify_instruction_site(&patch__flush_hash_A1, 0x7c0, hash_mb << 6); |
| 420 | modify_instruction_site(&patch__flush_hash_A2, 0x7c0, hash_mb2 << 6); |
Christophe Leroy | 9efc74f | 2018-11-09 17:33:24 +0000 | [diff] [blame] | 421 | modify_instruction_site(&patch__flush_hash_B, 0xffff, hmask); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 422 | } |
Benjamin Herrenschmidt | cd3db0c | 2010-07-06 15:39:02 -0700 | [diff] [blame] | 423 | |
| 424 | void setup_initial_memory_limit(phys_addr_t first_memblock_base, |
| 425 | phys_addr_t first_memblock_size) |
| 426 | { |
| 427 | /* We don't currently support the first MEMBLOCK not mapping 0 |
| 428 | * physical on those processors |
| 429 | */ |
| 430 | BUG_ON(first_memblock_base != 0); |
| 431 | |
Christophe Leroy | 8b14e1d | 2020-09-29 06:48:36 +0000 | [diff] [blame] | 432 | memblock_set_current_limit(min_t(u64, first_memblock_size, SZ_256M)); |
Benjamin Herrenschmidt | cd3db0c | 2010-07-06 15:39:02 -0700 | [diff] [blame] | 433 | } |
Christophe Leroy | 31ed2b1 | 2019-03-11 08:30:35 +0000 | [diff] [blame] | 434 | |
Christophe Leroy | e4dccf9 | 2019-04-26 16:36:39 +0000 | [diff] [blame] | 435 | void __init print_system_hash_info(void) |
| 436 | { |
| 437 | pr_info("Hash_size = 0x%lx\n", Hash_size); |
| 438 | if (Hash_mask) |
| 439 | pr_info("Hash_mask = 0x%lx\n", Hash_mask); |
| 440 | } |
| 441 | |
Christophe Leroy | 068fdba | 2020-10-22 06:29:41 +0000 | [diff] [blame] | 442 | void __init early_init_mmu(void) |
| 443 | { |
| 444 | } |