| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| # Copyright (C) 2020 Renesas Electronics Europe GmbH - https://www.renesas.com/eu/en/ |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/pci/rcar-pci-ep.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Renesas R-Car PCIe Endpoint |
| |
| maintainers: |
| - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> |
| - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
| |
| properties: |
| compatible: |
| items: |
| - const: renesas,r8a774c0-pcie-ep |
| - const: renesas,rcar-gen3-pcie-ep |
| |
| reg: |
| maxItems: 5 |
| |
| reg-names: |
| items: |
| - const: apb-base |
| - const: memory0 |
| - const: memory1 |
| - const: memory2 |
| - const: memory3 |
| |
| power-domains: |
| maxItems: 1 |
| |
| resets: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 1 |
| |
| clock-names: |
| items: |
| - const: pcie |
| |
| max-functions: |
| minimum: 1 |
| maximum: 1 |
| |
| required: |
| - compatible |
| - reg |
| - reg-names |
| - resets |
| - power-domains |
| - clocks |
| - clock-names |
| - max-functions |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/r8a774c0-cpg-mssr.h> |
| #include <dt-bindings/power/r8a774c0-sysc.h> |
| |
| pcie0_ep: pcie-ep@fe000000 { |
| compatible = "renesas,r8a774c0-pcie-ep", |
| "renesas,rcar-gen3-pcie-ep"; |
| reg = <0xfe000000 0x80000>, |
| <0xfe100000 0x100000>, |
| <0xfe200000 0x200000>, |
| <0x30000000 0x8000000>, |
| <0x38000000 0x8000000>; |
| reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; |
| resets = <&cpg 319>; |
| power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; |
| clocks = <&cpg CPG_MOD 319>; |
| clock-names = "pcie"; |
| max-functions = /bits/ 8 <1>; |
| }; |
