| /* |
| * Xtensa processor core configuration information. |
| * |
| * This file is subject to the terms and conditions of the GNU General Public |
| * License. See the file "COPYING" in the main directory of this archive |
| * for more details. |
| * |
| * Copyright (C) 1999-2006 Tensilica Inc. |
| */ |
| |
| #ifndef XTENSA_TIE_H |
| #define XTENSA_TIE_H |
| |
| /*---------------------------------------------------------------------- |
| COPROCESSORS and EXTRA STATE |
| ----------------------------------------------------------------------*/ |
| |
| #define XCHAL_CP_NUM 0 /* number of coprocessors */ |
| #define XCHAL_CP_MASK 0x00 |
| |
| #endif /*XTENSA_CONFIG_TIE_H*/ |
| |
