|  | # SPDX-License-Identifier: GPL-2.0-only | 
|  | # | 
|  | # SPI driver configuration | 
|  | # | 
|  | menuconfig SPI | 
|  | bool "SPI support" | 
|  | depends on HAS_IOMEM | 
|  | help | 
|  | The "Serial Peripheral Interface" is a low level synchronous | 
|  | protocol.  Chips that support SPI can have data transfer rates | 
|  | up to several tens of Mbit/sec.  Chips are addressed with a | 
|  | controller and a chipselect.  Most SPI slaves don't support | 
|  | dynamic device discovery; some are even write-only or read-only. | 
|  |  | 
|  | SPI is widely used by microcontrollers to talk with sensors, | 
|  | eeprom and flash memory, codecs and various other controller | 
|  | chips, analog to digital (and d-to-a) converters, and more. | 
|  | MMC and SD cards can be accessed using SPI protocol; and for | 
|  | DataFlash cards used in MMC sockets, SPI must always be used. | 
|  |  | 
|  | SPI is one of a family of similar protocols using a four wire | 
|  | interface (select, clock, data in, data out) including Microwire | 
|  | (half duplex), SSP, SSI, and PSP.  This driver framework should | 
|  | work with most such devices and controllers. | 
|  |  | 
|  | if SPI | 
|  |  | 
|  | config SPI_DEBUG | 
|  | bool "Debug support for SPI drivers" | 
|  | depends on DEBUG_KERNEL | 
|  | help | 
|  | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), | 
|  | sysfs, and debugfs support in SPI controller and protocol drivers. | 
|  |  | 
|  | # | 
|  | # MASTER side ... talking to discrete SPI slave chips including microcontrollers | 
|  | # | 
|  |  | 
|  | config SPI_MASTER | 
|  | #	bool "SPI Master Support" | 
|  | bool | 
|  | default SPI | 
|  | help | 
|  | If your system has an master-capable SPI controller (which | 
|  | provides the clock and chipselect), you can enable that | 
|  | controller and the protocol drivers for the SPI slave chips | 
|  | that are connected. | 
|  |  | 
|  | if SPI_MASTER | 
|  |  | 
|  | config SPI_MEM | 
|  | bool "SPI memory extension" | 
|  | help | 
|  | Enable this option if you want to enable the SPI memory extension. | 
|  | This extension is meant to simplify interaction with SPI memories | 
|  | by providing a high-level interface to send memory-like commands. | 
|  |  | 
|  | comment "SPI Master Controller Drivers" | 
|  |  | 
|  | config SPI_ALTERA | 
|  | tristate "Altera SPI Controller platform driver" | 
|  | select SPI_ALTERA_CORE | 
|  | select REGMAP_MMIO | 
|  | help | 
|  | This is the driver for the Altera SPI Controller. | 
|  |  | 
|  | config SPI_ALTERA_CORE | 
|  | tristate "Altera SPI Controller core code" if COMPILE_TEST | 
|  | select REGMAP | 
|  | help | 
|  | "The core code for the Altera SPI Controller" | 
|  |  | 
|  | config SPI_ALTERA_DFL | 
|  | tristate "DFL bus driver for Altera SPI Controller" | 
|  | depends on FPGA_DFL | 
|  | select SPI_ALTERA_CORE | 
|  | help | 
|  | This is a Device Feature List (DFL) bus driver for the | 
|  | Altera SPI master controller.  The SPI master is connected | 
|  | to a SPI slave to Avalon bridge in a Intel MAX BMC. | 
|  |  | 
|  | config SPI_AMLOGIC_SPIFC_A1 | 
|  | tristate "Amlogic A1 SPIFC controller" | 
|  | depends on ARCH_MESON || COMPILE_TEST | 
|  | help | 
|  | This enables master mode support for the SPIFC (SPI flash | 
|  | controller) available in Amlogic A1 (A113L SoC). | 
|  |  | 
|  | config SPI_AR934X | 
|  | tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver" | 
|  | depends on ATH79 || COMPILE_TEST | 
|  | help | 
|  | This enables support for the SPI controller present on the | 
|  | Qualcomm Atheros AR934X/QCA95XX SoCs. | 
|  |  | 
|  | config SPI_ATH79 | 
|  | tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" | 
|  | depends on ATH79 || COMPILE_TEST | 
|  | select SPI_BITBANG | 
|  | help | 
|  | This enables support for the SPI controller present on the | 
|  | Atheros AR71XX/AR724X/AR913X SoCs. | 
|  |  | 
|  | config SPI_ARMADA_3700 | 
|  | tristate "Marvell Armada 3700 SPI Controller" | 
|  | depends on (ARCH_MVEBU && OF) || COMPILE_TEST | 
|  | help | 
|  | This enables support for the SPI controller present on the | 
|  | Marvell Armada 3700 SoCs. | 
|  |  | 
|  | config SPI_ASPEED_SMC | 
|  | tristate "Aspeed flash controllers in SPI mode" | 
|  | depends on ARCH_ASPEED || COMPILE_TEST | 
|  | depends on OF | 
|  | help | 
|  | This enables support for the Firmware Memory controller (FMC) | 
|  | in the Aspeed AST2600, AST2500 and AST2400 SoCs when attached | 
|  | to SPI NOR chips, and support for the SPI flash memory | 
|  | controller (SPI) for the host firmware. The implementation | 
|  | only supports SPI NOR. | 
|  |  | 
|  | config SPI_ATMEL | 
|  | tristate "Atmel SPI Controller" | 
|  | depends on ARCH_AT91 || COMPILE_TEST | 
|  | depends on OF | 
|  | help | 
|  | This selects a driver for the Atmel SPI Controller, present on | 
|  | many AT91 ARM chips. | 
|  |  | 
|  | config SPI_AT91_USART | 
|  | tristate "Atmel USART Controller SPI driver" | 
|  | depends on (ARCH_AT91 || COMPILE_TEST) | 
|  | depends on MFD_AT91_USART | 
|  | help | 
|  | This selects a driver for the AT91 USART Controller as SPI Master, | 
|  | present on AT91 and SAMA5 SoC series. | 
|  |  | 
|  | config SPI_ATMEL_QUADSPI | 
|  | tristate "Atmel Quad SPI Controller" | 
|  | depends on ARCH_AT91 || COMPILE_TEST | 
|  | depends on OF && HAS_IOMEM | 
|  | help | 
|  | This enables support for the Quad SPI controller in master mode. | 
|  | This driver does not support generic SPI. The implementation only | 
|  | supports spi-mem interface. | 
|  |  | 
|  | config SPI_AU1550 | 
|  | tristate "Au1550/Au1200/Au1300 SPI Controller" | 
|  | depends on MIPS_ALCHEMY | 
|  | select SPI_BITBANG | 
|  | help | 
|  | If you say yes to this option, support will be included for the | 
|  | PSC SPI controller found on Au1550, Au1200 and Au1300 series. | 
|  |  | 
|  | config SPI_AXI_SPI_ENGINE | 
|  | tristate "Analog Devices AXI SPI Engine controller" | 
|  | depends on HAS_IOMEM | 
|  | help | 
|  | This enables support for the Analog Devices AXI SPI Engine SPI controller. | 
|  | It is part of the SPI Engine framework that is used in some Analog Devices | 
|  | reference designs for FPGAs. | 
|  |  | 
|  | config SPI_BCM2835 | 
|  | tristate "BCM2835 SPI controller" | 
|  | depends on GPIOLIB | 
|  | depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST | 
|  | help | 
|  | This selects a driver for the Broadcom BCM2835 SPI master. | 
|  |  | 
|  | The BCM2835 contains two types of SPI master controller; the | 
|  | "universal SPI master", and the regular SPI controller. This driver | 
|  | is for the regular SPI controller. Slave mode operation is not also | 
|  | not supported. | 
|  |  | 
|  | config SPI_BCM2835AUX | 
|  | tristate "BCM2835 SPI auxiliary controller" | 
|  | depends on ((ARCH_BCM2835 || ARCH_BRCMSTB) && GPIOLIB) || COMPILE_TEST | 
|  | help | 
|  | This selects a driver for the Broadcom BCM2835 SPI aux master. | 
|  |  | 
|  | The BCM2835 contains two types of SPI master controller; the | 
|  | "universal SPI master", and the regular SPI controller. | 
|  | This driver is for the universal/auxiliary SPI controller. | 
|  |  | 
|  | config SPI_BCM63XX | 
|  | tristate "Broadcom BCM63xx SPI controller" | 
|  | depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST | 
|  | help | 
|  | Enable support for the SPI controller on the Broadcom BCM63xx SoCs. | 
|  |  | 
|  | config SPI_BCM63XX_HSSPI | 
|  | tristate "Broadcom BCM63XX HS SPI controller driver" | 
|  | depends on BCM63XX || BMIPS_GENERIC || ARCH_BCMBCA || COMPILE_TEST | 
|  | help | 
|  | This enables support for the High Speed SPI controller present on | 
|  | newer Broadcom BCM63XX SoCs. | 
|  |  | 
|  | config SPI_BCM_QSPI | 
|  | tristate "Broadcom BSPI and MSPI controller support" | 
|  | depends on ARCH_BRCMSTB || ARCH_BCM || ARCH_BCM_IPROC || \ | 
|  | BMIPS_GENERIC || COMPILE_TEST | 
|  | default ARCH_BCM_IPROC | 
|  | help | 
|  | Enables support for the Broadcom SPI flash and MSPI controller. | 
|  | Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs | 
|  | based platforms. This driver works for both SPI master for SPI NOR | 
|  | flash device as well as MSPI device. | 
|  |  | 
|  | config SPI_BCMBCA_HSSPI | 
|  | tristate "Broadcom BCMBCA HS SPI controller driver" | 
|  | depends on ARCH_BCMBCA || COMPILE_TEST | 
|  | help | 
|  | This enables support for the High Speed SPI controller present on | 
|  | newer Broadcom BCMBCA SoCs. These SoCs include an updated SPI controller | 
|  | that adds the capability to allow the driver to control chip select | 
|  | explicitly. | 
|  |  | 
|  | config SPI_BITBANG | 
|  | tristate "Utilities for Bitbanging SPI masters" | 
|  | help | 
|  | With a few GPIO pins, your system can bitbang the SPI protocol. | 
|  | Select this to get SPI support through I/O pins (GPIO, parallel | 
|  | port, etc).  Or, some systems' SPI master controller drivers use | 
|  | this code to manage the per-word or per-transfer accesses to the | 
|  | hardware shift registers. | 
|  |  | 
|  | This is library code, and is automatically selected by drivers that | 
|  | need it.  You only need to select this explicitly to support driver | 
|  | modules that aren't part of this kernel tree. | 
|  |  | 
|  | config SPI_BUTTERFLY | 
|  | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" | 
|  | depends on PARPORT | 
|  | select SPI_BITBANG | 
|  | help | 
|  | This uses a custom parallel port cable to connect to an AVR | 
|  | Butterfly <http://www.atmel.com/products/avr/butterfly>, an | 
|  | inexpensive battery powered microcontroller evaluation board. | 
|  | This same cable can be used to flash new firmware. | 
|  |  | 
|  | config SPI_CADENCE | 
|  | tristate "Cadence SPI controller" | 
|  | help | 
|  | This selects the Cadence SPI controller master driver | 
|  | used by Xilinx Zynq and ZynqMP. | 
|  |  | 
|  | config SPI_CADENCE_QUADSPI | 
|  | tristate "Cadence Quad SPI controller" | 
|  | depends on OF && (ARM || ARM64 || X86 || RISCV || COMPILE_TEST) | 
|  | help | 
|  | Enable support for the Cadence Quad SPI Flash controller. | 
|  |  | 
|  | Cadence QSPI is a specialized controller for connecting an SPI | 
|  | Flash over 1/2/4-bit wide bus. Enable this option if you have a | 
|  | device with a Cadence QSPI controller and want to access the | 
|  | Flash as an MTD device. | 
|  |  | 
|  | config SPI_CADENCE_XSPI | 
|  | tristate "Cadence XSPI controller" | 
|  | depends on OF && HAS_IOMEM | 
|  | depends on SPI_MEM | 
|  | help | 
|  | Enable support for the Cadence XSPI Flash controller. | 
|  |  | 
|  | Cadence XSPI is a specialized controller for connecting an SPI | 
|  | Flash over up to 8-bit wide bus. Enable this option if you have a | 
|  | device with a Cadence XSPI controller and want to access the | 
|  | Flash as an MTD device. | 
|  |  | 
|  | config SPI_CLPS711X | 
|  | tristate "CLPS711X host SPI controller" | 
|  | depends on ARCH_CLPS711X || COMPILE_TEST | 
|  | help | 
|  | This enables dedicated general purpose SPI/Microwire1-compatible | 
|  | master mode interface (SSI1) for CLPS711X-based CPUs. | 
|  |  | 
|  | config SPI_COLDFIRE_QSPI | 
|  | tristate "Freescale Coldfire QSPI controller" | 
|  | depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x) | 
|  | help | 
|  | This enables support for the Coldfire QSPI controller in master | 
|  | mode. | 
|  |  | 
|  | config SPI_DAVINCI | 
|  | tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" | 
|  | depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST | 
|  | select SPI_BITBANG | 
|  | help | 
|  | SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. | 
|  |  | 
|  | config SPI_DESIGNWARE | 
|  | tristate "DesignWare SPI controller core support" | 
|  | imply SPI_MEM | 
|  | help | 
|  | general driver for SPI controller core from DesignWare | 
|  |  | 
|  | if SPI_DESIGNWARE | 
|  |  | 
|  | config SPI_DW_DMA | 
|  | bool "DMA support for DW SPI controller" | 
|  |  | 
|  | config SPI_DW_PCI | 
|  | tristate "PCI interface driver for DW SPI core" | 
|  | depends on PCI | 
|  |  | 
|  | config SPI_DW_MMIO | 
|  | tristate "Memory-mapped io interface driver for DW SPI core" | 
|  | depends on HAS_IOMEM | 
|  |  | 
|  | config SPI_DW_BT1 | 
|  | tristate "Baikal-T1 SPI driver for DW SPI core" | 
|  | depends on MIPS_BAIKAL_T1 || COMPILE_TEST | 
|  | select MULTIPLEXER | 
|  | help | 
|  | Baikal-T1 SoC is equipped with three DW APB SSI-based MMIO SPI | 
|  | controllers. Two of them are pretty much normal: with IRQ, DMA, | 
|  | FIFOs of 64 words depth, 4x CSs, but the third one as being a | 
|  | part of the Baikal-T1 System Boot Controller has got a very | 
|  | limited resources: no IRQ, no DMA, only a single native | 
|  | chip-select and Tx/Rx FIFO with just 8 words depth available. | 
|  | The later one is normally connected to an external SPI-nor flash | 
|  | of 128Mb (in general can be of bigger size). | 
|  |  | 
|  | config SPI_DW_BT1_DIRMAP | 
|  | bool "Directly mapped Baikal-T1 Boot SPI flash support" | 
|  | depends on SPI_DW_BT1 | 
|  | help | 
|  | Directly mapped SPI flash memory is an interface specific to the | 
|  | Baikal-T1 System Boot Controller. It is a 16MB MMIO region, which | 
|  | can be used to access a peripheral memory device just by | 
|  | reading/writing data from/to it. Note that the system APB bus | 
|  | will stall during each IO from/to the dirmap region until the | 
|  | operation is finished. So try not to use it concurrently with | 
|  | time-critical tasks (like the SPI memory operations implemented | 
|  | in this driver). | 
|  |  | 
|  | endif | 
|  |  | 
|  | config SPI_DLN2 | 
|  | tristate "Diolan DLN-2 USB SPI adapter" | 
|  | depends on MFD_DLN2 | 
|  | help | 
|  | If you say yes to this option, support will be included for Diolan | 
|  | DLN2, a USB to SPI interface. | 
|  |  | 
|  | This driver can also be built as a module.  If so, the module | 
|  | will be called spi-dln2. | 
|  |  | 
|  | config SPI_EP93XX | 
|  | tristate "Cirrus Logic EP93xx SPI controller" | 
|  | depends on ARCH_EP93XX || COMPILE_TEST | 
|  | help | 
|  | This enables using the Cirrus EP93xx SPI controller in master | 
|  | mode. | 
|  |  | 
|  | config SPI_FALCON | 
|  | bool "Falcon SPI controller support" | 
|  | depends on SOC_FALCON | 
|  | help | 
|  | The external bus unit (EBU) found on the FALC-ON SoC has SPI | 
|  | emulation that is designed for serial flash access. This driver | 
|  | has only been tested with m25p80 type chips. The hardware has no | 
|  | support for other types of SPI peripherals. | 
|  |  | 
|  | config SPI_FSI | 
|  | tristate "FSI SPI driver" | 
|  | depends on FSI | 
|  | help | 
|  | This enables support for the driver for FSI bus attached SPI | 
|  | controllers. | 
|  |  | 
|  | config SPI_FSL_LPSPI | 
|  | tristate "Freescale i.MX LPSPI controller" | 
|  | depends on ARCH_MXC || COMPILE_TEST | 
|  | help | 
|  | This enables Freescale i.MX LPSPI controllers in master mode. | 
|  |  | 
|  | config SPI_FSL_QUADSPI | 
|  | tristate "Freescale QSPI controller" | 
|  | depends on ARCH_MXC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST | 
|  | depends on HAS_IOMEM | 
|  | help | 
|  | This enables support for the Quad SPI controller in master mode. | 
|  | Up to four flash chips can be connected on two buses with two | 
|  | chipselects each. | 
|  | This controller does not support generic SPI messages. It only | 
|  | supports the high-level SPI memory interface. | 
|  |  | 
|  | config SPI_GXP | 
|  | tristate "GXP SPI driver" | 
|  | depends on ARCH_HPE || COMPILE_TEST | 
|  | help | 
|  | This enables support for the driver for GXP bus attached SPI | 
|  | controllers. | 
|  |  | 
|  | config SPI_HISI_KUNPENG | 
|  | tristate "HiSilicon SPI Controller for Kunpeng SoCs" | 
|  | depends on (ARM64 && ACPI) || COMPILE_TEST | 
|  | help | 
|  | This enables support for HiSilicon SPI controller found on | 
|  | Kunpeng SoCs. | 
|  |  | 
|  | This driver can also be built as a module. If so, the module | 
|  | will be called hisi-kunpeng-spi. | 
|  |  | 
|  | config SPI_HISI_SFC_V3XX | 
|  | tristate "HiSilicon SPI NOR Flash Controller for Hi16XX chipsets" | 
|  | depends on (ARM64 && ACPI) || COMPILE_TEST | 
|  | depends on HAS_IOMEM | 
|  | help | 
|  | This enables support for HiSilicon v3xx SPI NOR flash controller | 
|  | found in hi16xx chipsets. | 
|  |  | 
|  | config SPI_NXP_FLEXSPI | 
|  | tristate "NXP Flex SPI controller" | 
|  | depends on ARCH_LAYERSCAPE || ARCH_MXC || COMPILE_TEST | 
|  | depends on HAS_IOMEM | 
|  | help | 
|  | This enables support for the Flex SPI controller in master mode. | 
|  | Up to four slave devices can be connected on two buses with two | 
|  | chipselects each. | 
|  | This controller does not support generic SPI messages and only | 
|  | supports the high-level SPI memory interface. | 
|  |  | 
|  | config SPI_GPIO | 
|  | tristate "GPIO-based bitbanging SPI Master" | 
|  | depends on GPIOLIB || COMPILE_TEST | 
|  | select SPI_BITBANG | 
|  | help | 
|  | This simple GPIO bitbanging SPI master uses the arch-neutral GPIO | 
|  | interface to manage MOSI, MISO, SCK, and chipselect signals.  SPI | 
|  | slaves connected to a bus using this driver are configured as usual, | 
|  | except that the spi_board_info.controller_data holds the GPIO number | 
|  | for the chipselect used by this controller driver. | 
|  |  | 
|  | Note that this driver often won't achieve even 1 Mbit/sec speeds, | 
|  | making it unusually slow for SPI.  If your platform can inline | 
|  | GPIO operations, you should be able to leverage that for better | 
|  | speed with a custom version of this driver; see the source code. | 
|  |  | 
|  | config SPI_IMG_SPFI | 
|  | tristate "IMG SPFI controller" | 
|  | depends on MIPS || COMPILE_TEST | 
|  | help | 
|  | This enables support for the SPFI master controller found on | 
|  | IMG SoCs. | 
|  |  | 
|  | config SPI_IMX | 
|  | tristate "Freescale i.MX SPI controllers" | 
|  | depends on ARCH_MXC || COMPILE_TEST | 
|  | help | 
|  | This enables support for the Freescale i.MX SPI controllers. | 
|  |  | 
|  | config SPI_INGENIC | 
|  | tristate "Ingenic SoCs SPI controller" | 
|  | depends on MACH_INGENIC || COMPILE_TEST | 
|  | help | 
|  | This enables support for the Ingenic SoCs SPI controller. | 
|  |  | 
|  | To compile this driver as a module, choose M here: the module | 
|  | will be called spi-ingenic. | 
|  |  | 
|  | config SPI_INTEL | 
|  | tristate | 
|  |  | 
|  | config SPI_INTEL_PCI | 
|  | tristate "Intel PCH/PCU SPI flash PCI driver" | 
|  | depends on PCI | 
|  | depends on X86 || COMPILE_TEST | 
|  | depends on SPI_MEM | 
|  | select SPI_INTEL | 
|  | help | 
|  | This enables PCI support for the Intel PCH/PCU SPI controller in | 
|  | master mode. This controller is used to hold BIOS and other | 
|  | persistent settings. Controllers present in modern Intel hardware | 
|  | only work in hardware sequencing mode, this means that the | 
|  | controller exposes a subset of operations that makes it safer to | 
|  | use. Using this driver it is possible to upgrade BIOS directly | 
|  | from Linux. | 
|  |  | 
|  | To compile this driver as a module, choose M here: the module | 
|  | will be called spi-intel-pci. | 
|  |  | 
|  | config SPI_INTEL_PLATFORM | 
|  | tristate "Intel PCH/PCU SPI flash platform driver (DANGEROUS)" | 
|  | depends on X86 || COMPILE_TEST | 
|  | depends on SPI_MEM | 
|  | select SPI_INTEL | 
|  | help | 
|  | This enables platform support for the Intel PCH/PCU SPI | 
|  | controller in master mode that is used to hold BIOS and other | 
|  | persistent settings. Most of these controllers work in | 
|  | software sequencing mode, which means that the controller | 
|  | exposes the low level SPI-NOR opcodes to the software. Using | 
|  | this driver it is possible to upgrade BIOS directly from Linux. | 
|  |  | 
|  | Say N here unless you know what you are doing. Overwriting the | 
|  | SPI flash may render the system unbootable. | 
|  |  | 
|  | To compile this driver as a module, choose M here: the module | 
|  | will be called spi-intel-platform. | 
|  |  | 
|  | config SPI_JCORE | 
|  | tristate "J-Core SPI Master" | 
|  | depends on OF && (SUPERH || COMPILE_TEST) | 
|  | help | 
|  | This enables support for the SPI master controller in the J-Core | 
|  | synthesizable, open source SoC. | 
|  |  | 
|  | config SPI_LM70_LLP | 
|  | tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" | 
|  | depends on PARPORT | 
|  | select SPI_BITBANG | 
|  | help | 
|  | This driver supports the NS LM70 LLP Evaluation Board, | 
|  | which interfaces to an LM70 temperature sensor using | 
|  | a parallel port. | 
|  |  | 
|  | config SPI_LP8841_RTC | 
|  | tristate "ICP DAS LP-8841 SPI Controller for RTC" | 
|  | depends on MACH_PXA27X_DT || COMPILE_TEST | 
|  | help | 
|  | This driver provides an SPI master device to drive Maxim | 
|  | DS-1302 real time clock. | 
|  |  | 
|  | Say N here unless you plan to run the kernel on an ICP DAS | 
|  | LP-8x4x industrial computer. | 
|  |  | 
|  | config SPI_MPC52xx | 
|  | tristate "Freescale MPC52xx SPI (non-PSC) controller support" | 
|  | depends on PPC_MPC52xx | 
|  | help | 
|  | This drivers supports the MPC52xx SPI controller in master SPI | 
|  | mode. | 
|  |  | 
|  | config SPI_MPC52xx_PSC | 
|  | tristate "Freescale MPC52xx PSC SPI controller" | 
|  | depends on PPC_MPC52xx | 
|  | help | 
|  | This enables using the Freescale MPC52xx Programmable Serial | 
|  | Controller in master SPI mode. | 
|  |  | 
|  | config SPI_MPC512x_PSC | 
|  | tristate "Freescale MPC512x PSC SPI controller" | 
|  | depends on PPC_MPC512x | 
|  | help | 
|  | This enables using the Freescale MPC5121 Programmable Serial | 
|  | Controller in SPI master mode. | 
|  |  | 
|  | config SPI_FSL_LIB | 
|  | tristate | 
|  | depends on OF | 
|  |  | 
|  | config SPI_FSL_CPM | 
|  | tristate | 
|  | depends on FSL_SOC | 
|  |  | 
|  | config SPI_FSL_SPI | 
|  | tristate "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller" | 
|  | depends on OF | 
|  | select SPI_FSL_LIB | 
|  | select SPI_FSL_CPM if FSL_SOC | 
|  | help | 
|  | This enables using the Freescale SPI controllers in master mode. | 
|  | MPC83xx platform uses the controller in cpu mode or CPM/QE mode. | 
|  | MPC8569 uses the controller in QE mode, MPC8610 in cpu mode. | 
|  | This also enables using the Aeroflex Gaisler GRLIB SPI controller in | 
|  | master mode. | 
|  |  | 
|  | config SPI_FSL_DSPI | 
|  | tristate "Freescale DSPI controller" | 
|  | select REGMAP_MMIO | 
|  | depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || M5441x || COMPILE_TEST | 
|  | help | 
|  | This enables support for the Freescale DSPI controller in master | 
|  | mode. VF610, LS1021A and ColdFire platforms uses the controller. | 
|  |  | 
|  | config SPI_FSL_ESPI | 
|  | tristate "Freescale eSPI controller" | 
|  | depends on FSL_SOC | 
|  | help | 
|  | This enables using the Freescale eSPI controllers in master mode. | 
|  | From MPC8536, 85xx platform uses the controller, and all P10xx, | 
|  | P20xx, P30xx,P40xx, P50xx uses this controller. | 
|  |  | 
|  | config SPI_MESON_SPICC | 
|  | tristate "Amlogic Meson SPICC controller" | 
|  | depends on COMMON_CLK | 
|  | depends on ARCH_MESON || COMPILE_TEST | 
|  | help | 
|  | This enables master mode support for the SPICC (SPI communication | 
|  | controller) available in Amlogic Meson SoCs. | 
|  |  | 
|  | config SPI_MESON_SPIFC | 
|  | tristate "Amlogic Meson SPIFC controller" | 
|  | depends on ARCH_MESON || COMPILE_TEST | 
|  | select REGMAP_MMIO | 
|  | help | 
|  | This enables master mode support for the SPIFC (SPI flash | 
|  | controller) available in Amlogic Meson SoCs. | 
|  |  | 
|  | config SPI_MICROCHIP_CORE | 
|  | tristate "Microchip FPGA SPI controllers" | 
|  | depends on SPI_MASTER | 
|  | help | 
|  | This enables the SPI driver for Microchip FPGA SPI controllers. | 
|  | Say Y or M here if you want to use the "hard" controllers on | 
|  | PolarFire SoC. | 
|  | If built as a module, it will be called spi-microchip-core. | 
|  |  | 
|  | config SPI_MICROCHIP_CORE_QSPI | 
|  | tristate "Microchip FPGA QSPI controllers" | 
|  | depends on SPI_MASTER | 
|  | help | 
|  | This enables the QSPI driver for Microchip FPGA QSPI controllers. | 
|  | Say Y or M here if you want to use the QSPI controllers on | 
|  | PolarFire SoC. | 
|  | If built as a module, it will be called spi-microchip-core-qspi. | 
|  |  | 
|  | config SPI_MT65XX | 
|  | tristate "MediaTek SPI controller" | 
|  | depends on ARCH_MEDIATEK || COMPILE_TEST | 
|  | help | 
|  | This selects the MediaTek(R) SPI bus driver. | 
|  | If you want to use MediaTek(R) SPI interface, | 
|  | say Y or M here.If you are not sure, say N. | 
|  | SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs. | 
|  |  | 
|  | config SPI_MT7621 | 
|  | tristate "MediaTek MT7621 SPI Controller" | 
|  | depends on RALINK || COMPILE_TEST | 
|  | help | 
|  | This selects a driver for the MediaTek MT7621 SPI Controller. | 
|  |  | 
|  | config SPI_MTK_NOR | 
|  | tristate "MediaTek SPI NOR controller" | 
|  | depends on ARCH_MEDIATEK || COMPILE_TEST | 
|  | help | 
|  | This enables support for SPI NOR controller found on MediaTek | 
|  | ARM SoCs. This is a controller specifically for SPI NOR flash. | 
|  | It can perform generic SPI transfers up to 6 bytes via generic | 
|  | SPI interface as well as several SPI NOR specific instructions | 
|  | via SPI MEM interface. | 
|  |  | 
|  | config SPI_MTK_SNFI | 
|  | tristate "MediaTek SPI NAND Flash Interface" | 
|  | depends on ARCH_MEDIATEK || COMPILE_TEST | 
|  | depends on MTD_NAND_ECC_MEDIATEK | 
|  | help | 
|  | This enables support for SPI-NAND mode on the MediaTek NAND | 
|  | Flash Interface found on MediaTek ARM SoCs. This controller | 
|  | is implemented as a SPI-MEM controller with pipelined ECC | 
|  | capcability. | 
|  |  | 
|  | config SPI_WPCM_FIU | 
|  | tristate "Nuvoton WPCM450 Flash Interface Unit" | 
|  | depends on ARCH_NPCM || COMPILE_TEST | 
|  | select REGMAP | 
|  | help | 
|  | This enables support got the Flash Interface Unit SPI controller | 
|  | present in the Nuvoton WPCM450 SoC. | 
|  |  | 
|  | This driver does not support generic SPI. The implementation only | 
|  | supports the spi-mem interface. | 
|  |  | 
|  | config SPI_NPCM_FIU | 
|  | tristate "Nuvoton NPCM FLASH Interface Unit" | 
|  | depends on ARCH_NPCM || COMPILE_TEST | 
|  | depends on OF && HAS_IOMEM | 
|  | help | 
|  | This enables support for the Flash Interface Unit SPI controller | 
|  | in master mode. | 
|  | This driver does not support generic SPI. The implementation only | 
|  | supports spi-mem interface. | 
|  |  | 
|  | config SPI_NPCM_PSPI | 
|  | tristate "Nuvoton NPCM PSPI Controller" | 
|  | depends on ARCH_NPCM || COMPILE_TEST | 
|  | help | 
|  | This driver provides support for Nuvoton NPCM BMC | 
|  | Peripheral SPI controller in master mode. | 
|  |  | 
|  | config SPI_LANTIQ_SSC | 
|  | tristate "Lantiq SSC SPI controller" | 
|  | depends on LANTIQ || X86 || COMPILE_TEST | 
|  | help | 
|  | This driver supports the Lantiq SSC SPI controller in master | 
|  | mode. This controller is found on Intel (former Lantiq) SoCs like | 
|  | the Danube, Falcon, xRX200, xRX300, Lightning Mountain. | 
|  |  | 
|  | config SPI_OC_TINY | 
|  | tristate "OpenCores tiny SPI" | 
|  | depends on GPIOLIB || COMPILE_TEST | 
|  | select SPI_BITBANG | 
|  | help | 
|  | This is the driver for OpenCores tiny SPI master controller. | 
|  |  | 
|  | config SPI_OCTEON | 
|  | tristate "Cavium OCTEON SPI controller" | 
|  | depends on CAVIUM_OCTEON_SOC | 
|  | help | 
|  | SPI host driver for the hardware found on some Cavium OCTEON | 
|  | SOCs. | 
|  |  | 
|  | config SPI_OMAP_UWIRE | 
|  | tristate "OMAP1 MicroWire" | 
|  | depends on ARCH_OMAP1 || (ARM && COMPILE_TEST) | 
|  | select SPI_BITBANG | 
|  | help | 
|  | This hooks up to the MicroWire controller on OMAP1 chips. | 
|  |  | 
|  | config SPI_OMAP24XX | 
|  | tristate "McSPI driver for OMAP" | 
|  | depends on ARCH_OMAP2PLUS || ARCH_K3 || COMPILE_TEST | 
|  | select SG_SPLIT | 
|  | help | 
|  | SPI master controller for OMAP24XX and later Multichannel SPI | 
|  | (McSPI) modules. | 
|  |  | 
|  | config SPI_TI_QSPI | 
|  | tristate "DRA7xxx QSPI controller support" | 
|  | depends on ARCH_OMAP2PLUS || COMPILE_TEST | 
|  | help | 
|  | QSPI master controller for DRA7xxx used for flash devices. | 
|  | This device supports single, dual and quad read support, while | 
|  | it only supports single write mode. | 
|  |  | 
|  | config SPI_ORION | 
|  | tristate "Orion SPI master" | 
|  | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST | 
|  | help | 
|  | This enables using the SPI master controller on the Orion | 
|  | and MVEBU chips. | 
|  |  | 
|  | config SPI_PCI1XXXX | 
|  | tristate "PCI1XXXX SPI Bus support" | 
|  | depends on PCI | 
|  | help | 
|  | Say "yes" to Enable the SPI Bus support for the PCI1xxxx card | 
|  | This is a PCI to SPI Bus driver | 
|  | This driver can be built as module. If so, the module will be | 
|  | called as spi-pci1xxxx. | 
|  |  | 
|  | config SPI_PIC32 | 
|  | tristate "Microchip PIC32 series SPI" | 
|  | depends on MACH_PIC32 || COMPILE_TEST | 
|  | help | 
|  | SPI driver for Microchip PIC32 SPI master controller. | 
|  |  | 
|  | config SPI_PIC32_SQI | 
|  | tristate "Microchip PIC32 Quad SPI driver" | 
|  | depends on MACH_PIC32 || COMPILE_TEST | 
|  | help | 
|  | SPI driver for PIC32 Quad SPI controller. | 
|  |  | 
|  | config SPI_PL022 | 
|  | tristate "ARM AMBA PL022 SSP controller" | 
|  | depends on ARM_AMBA | 
|  | default y if ARCH_REALVIEW | 
|  | default y if INTEGRATOR_IMPD1 | 
|  | default y if ARCH_VERSATILE | 
|  | help | 
|  | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP | 
|  | controller. If you have an embedded system with an AMBA(R) | 
|  | bus and a PL022 controller, say Y or M here. | 
|  |  | 
|  | config SPI_PPC4xx | 
|  | tristate "PPC4xx SPI Controller" | 
|  | depends on PPC32 && 4xx | 
|  | select SPI_BITBANG | 
|  | help | 
|  | This selects a driver for the PPC4xx SPI Controller. | 
|  |  | 
|  | config SPI_PXA2XX | 
|  | tristate "PXA2xx SSP SPI master" | 
|  | depends on ARCH_PXA || ARCH_MMP || PCI || ACPI || COMPILE_TEST | 
|  | select PXA_SSP if ARCH_PXA || ARCH_MMP | 
|  | help | 
|  | This enables using a PXA2xx or Sodaville SSP port as a SPI master | 
|  | controller. The driver can be configured to use any SSP port and | 
|  | additional documentation can be found a Documentation/spi/pxa2xx.rst. | 
|  |  | 
|  | config SPI_PXA2XX_PCI | 
|  | def_tristate SPI_PXA2XX && PCI && COMMON_CLK | 
|  |  | 
|  | config SPI_ROCKCHIP | 
|  | tristate "Rockchip SPI controller driver" | 
|  | depends on ARCH_ROCKCHIP || COMPILE_TEST | 
|  | help | 
|  | This selects a driver for Rockchip SPI controller. | 
|  |  | 
|  | If you say yes to this option, support will be included for | 
|  | RK3066, RK3188 and RK3288 families of SPI controller. | 
|  | Rockchip SPI controller support DMA transport and PIO mode. | 
|  | The main usecase of this controller is to use spi flash as boot | 
|  | device. | 
|  |  | 
|  | config SPI_ROCKCHIP_SFC | 
|  | tristate "Rockchip Serial Flash Controller (SFC)" | 
|  | depends on ARCH_ROCKCHIP || COMPILE_TEST | 
|  | depends on HAS_IOMEM && HAS_DMA | 
|  | help | 
|  | This enables support for Rockchip serial flash controller. This | 
|  | is a specialized controller used to access SPI flash on some | 
|  | Rockchip SOCs. | 
|  |  | 
|  | ROCKCHIP SFC supports DMA and PIO modes. When DMA is not available, | 
|  | the driver automatically falls back to PIO mode. | 
|  |  | 
|  | config SPI_RB4XX | 
|  | tristate "Mikrotik RB4XX SPI master" | 
|  | depends on SPI_MASTER && ATH79 | 
|  | help | 
|  | SPI controller driver for the Mikrotik RB4xx series boards. | 
|  |  | 
|  | config SPI_RPCIF | 
|  | tristate "Renesas RPC-IF SPI driver" | 
|  | depends on RENESAS_RPCIF | 
|  | help | 
|  | SPI driver for Renesas R-Car Gen3 or RZ/G2 RPC-IF. | 
|  |  | 
|  | config SPI_RSPI | 
|  | tristate "Renesas RSPI/QSPI controller" | 
|  | depends on SUPERH || ARCH_RENESAS || COMPILE_TEST | 
|  | help | 
|  | SPI driver for Renesas RSPI and QSPI blocks. | 
|  |  | 
|  | config SPI_QCOM_QSPI | 
|  | tristate "QTI QSPI controller" | 
|  | depends on ARCH_QCOM || COMPILE_TEST | 
|  | help | 
|  | QSPI(Quad SPI) driver for Qualcomm QSPI controller. | 
|  |  | 
|  | config SPI_QUP | 
|  | tristate "Qualcomm SPI controller with QUP interface" | 
|  | depends on ARCH_QCOM || COMPILE_TEST | 
|  | help | 
|  | Qualcomm Universal Peripheral (QUP) core is an AHB slave that | 
|  | provides a common data path (an output FIFO and an input FIFO) | 
|  | for serial peripheral interface (SPI) mini-core. SPI in master | 
|  | mode supports up to 50MHz, up to four chip selects, programmable | 
|  | data path from 4 bits to 32 bits and numerous protocol variants. | 
|  |  | 
|  | This driver can also be built as a module.  If so, the module | 
|  | will be called spi_qup. | 
|  |  | 
|  | config SPI_QCOM_GENI | 
|  | tristate "Qualcomm GENI based SPI controller" | 
|  | depends on QCOM_GENI_SE | 
|  | help | 
|  | This driver supports GENI serial engine based SPI controller in | 
|  | master mode on the Qualcomm Technologies Inc.'s SoCs. If you say | 
|  | yes to this option, support will be included for the built-in SPI | 
|  | interface on the Qualcomm Technologies Inc.'s SoCs. | 
|  |  | 
|  | This driver can also be built as a module.  If so, the module | 
|  | will be called spi-geni-qcom. | 
|  |  | 
|  | config SPI_S3C64XX | 
|  | tristate "Samsung S3C64XX/Exynos SoC series type SPI" | 
|  | depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST) | 
|  | help | 
|  | SPI driver for Samsung S3C64XX, S5Pv210 and Exynos SoCs. | 
|  | Choose Y/M here only if you build for such Samsung SoC. | 
|  |  | 
|  | config SPI_SC18IS602 | 
|  | tristate "NXP SC18IS602/602B/603 I2C to SPI bridge" | 
|  | depends on I2C | 
|  | help | 
|  | SPI driver for NXP SC18IS602/602B/603 I2C to SPI bridge. | 
|  |  | 
|  | config SPI_SH_MSIOF | 
|  | tristate "SuperH MSIOF SPI controller" | 
|  | depends on HAVE_CLK | 
|  | depends on ARCH_SHMOBILE || ARCH_RENESAS || COMPILE_TEST | 
|  | help | 
|  | SPI driver for SuperH and SH Mobile MSIOF blocks. | 
|  |  | 
|  | config SPI_SH | 
|  | tristate "SuperH SPI controller" | 
|  | depends on SUPERH || COMPILE_TEST | 
|  | help | 
|  | SPI driver for SuperH SPI blocks. | 
|  |  | 
|  | config SPI_SH_SCI | 
|  | tristate "SuperH SCI SPI controller" | 
|  | depends on SUPERH | 
|  | select SPI_BITBANG | 
|  | help | 
|  | SPI driver for SuperH SCI blocks. | 
|  |  | 
|  | config SPI_SH_HSPI | 
|  | tristate "SuperH HSPI controller" | 
|  | depends on ARCH_RENESAS || COMPILE_TEST | 
|  | help | 
|  | SPI driver for SuperH HSPI blocks. | 
|  |  | 
|  | config SPI_SIFIVE | 
|  | tristate "SiFive SPI controller" | 
|  | depends on HAS_IOMEM | 
|  | help | 
|  | This exposes the SPI controller IP from SiFive. | 
|  |  | 
|  | config SPI_SLAVE_MT27XX | 
|  | tristate "MediaTek SPI slave device" | 
|  | depends on ARCH_MEDIATEK || COMPILE_TEST | 
|  | depends on SPI_SLAVE | 
|  | help | 
|  | This selects the MediaTek(R) SPI slave device driver. | 
|  | If you want to use MediaTek(R) SPI slave interface, | 
|  | say Y or M here.If you are not sure, say N. | 
|  | SPI slave drivers for Mediatek MT27XX series ARM SoCs. | 
|  |  | 
|  | config SPI_SN_F_OSPI | 
|  | tristate "Socionext F_OSPI SPI flash controller" | 
|  | depends on OF && HAS_IOMEM | 
|  | depends on SPI_MEM | 
|  | help | 
|  | This enables support for the Socionext F_OSPI controller | 
|  | for connecting an SPI Flash memory over up to 8-bit wide bus. | 
|  | It supports indirect access mode only. | 
|  |  | 
|  | config SPI_SPRD | 
|  | tristate "Spreadtrum SPI controller" | 
|  | depends on ARCH_SPRD || COMPILE_TEST | 
|  | help | 
|  | SPI driver for Spreadtrum SoCs. | 
|  |  | 
|  | config SPI_SPRD_ADI | 
|  | tristate "Spreadtrum ADI controller" | 
|  | depends on ARCH_SPRD || COMPILE_TEST | 
|  | depends on HWSPINLOCK || (COMPILE_TEST && !HWSPINLOCK) | 
|  | help | 
|  | ADI driver based on SPI for Spreadtrum SoCs. | 
|  |  | 
|  | config SPI_STM32 | 
|  | tristate "STMicroelectronics STM32 SPI controller" | 
|  | depends on ARCH_STM32 || COMPILE_TEST | 
|  | help | 
|  | SPI driver for STMicroelectronics STM32 SoCs. | 
|  |  | 
|  | STM32 SPI controller supports DMA and PIO modes. When DMA | 
|  | is not available, the driver automatically falls back to | 
|  | PIO mode. | 
|  |  | 
|  | config SPI_STM32_QSPI | 
|  | tristate "STMicroelectronics STM32 QUAD SPI controller" | 
|  | depends on ARCH_STM32 || COMPILE_TEST | 
|  | depends on OF | 
|  | depends on SPI_MEM | 
|  | help | 
|  | This enables support for the Quad SPI controller in master mode. | 
|  | This driver does not support generic SPI. The implementation only | 
|  | supports spi-mem interface. | 
|  |  | 
|  | config SPI_ST_SSC4 | 
|  | tristate "STMicroelectronics SPI SSC-based driver" | 
|  | depends on ARCH_STI || COMPILE_TEST | 
|  | help | 
|  | STMicroelectronics SoCs support for SPI. If you say yes to | 
|  | this option, support will be included for the SSC driven SPI. | 
|  |  | 
|  | config SPI_SUN4I | 
|  | tristate "Allwinner A10 SoCs SPI controller" | 
|  | depends on ARCH_SUNXI || COMPILE_TEST | 
|  | help | 
|  | SPI driver for Allwinner sun4i, sun5i and sun7i SoCs | 
|  |  | 
|  | config SPI_SUN6I | 
|  | tristate "Allwinner A31 SPI controller" | 
|  | depends on ARCH_SUNXI || COMPILE_TEST | 
|  | depends on RESET_CONTROLLER | 
|  | help | 
|  | This enables using the SPI controller on the Allwinner A31 SoCs. | 
|  |  | 
|  | config SPI_SUNPLUS_SP7021 | 
|  | tristate "Sunplus SP7021 SPI controller" | 
|  | depends on SOC_SP7021 || COMPILE_TEST | 
|  | help | 
|  | This enables Sunplus SP7021 SPI controller driver on the SP7021 SoCs. | 
|  | This driver can also be built as a module. If so, the module will be | 
|  | called as spi-sunplus-sp7021. | 
|  |  | 
|  | If you have a  Sunplus SP7021 platform say Y here. | 
|  | If unsure, say N. | 
|  |  | 
|  | config SPI_SYNQUACER | 
|  | tristate "Socionext's SynQuacer HighSpeed SPI controller" | 
|  | depends on ARCH_SYNQUACER || COMPILE_TEST | 
|  | help | 
|  | SPI driver for Socionext's High speed SPI controller which provides | 
|  | various operating modes for interfacing to serial peripheral devices | 
|  | that use the de-facto standard SPI protocol. | 
|  |  | 
|  | It also supports the new dual-bit and quad-bit SPI protocol. | 
|  |  | 
|  | config SPI_MXIC | 
|  | tristate "Macronix MX25F0A SPI controller" | 
|  | depends on SPI_MASTER | 
|  | imply MTD_NAND_ECC_MXIC | 
|  | help | 
|  | This selects the Macronix MX25F0A SPI controller driver. | 
|  |  | 
|  | config SPI_MXS | 
|  | tristate "Freescale MXS SPI controller" | 
|  | depends on ARCH_MXS | 
|  | select STMP_DEVICE | 
|  | help | 
|  | SPI driver for Freescale MXS devices. | 
|  |  | 
|  | config SPI_TEGRA210_QUAD | 
|  | tristate "NVIDIA Tegra QSPI Controller" | 
|  | depends on ARCH_TEGRA || COMPILE_TEST | 
|  | depends on RESET_CONTROLLER | 
|  | help | 
|  | QSPI driver for NVIDIA Tegra QSPI Controller interface. This | 
|  | controller is different from the SPI controller and is available | 
|  | on Tegra SoCs starting from Tegra210. | 
|  |  | 
|  | config SPI_TEGRA114 | 
|  | tristate "NVIDIA Tegra114 SPI Controller" | 
|  | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST | 
|  | depends on RESET_CONTROLLER | 
|  | help | 
|  | SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller | 
|  | is different than the older SoCs SPI controller and also register interface | 
|  | get changed with this controller. | 
|  |  | 
|  | config SPI_TEGRA20_SFLASH | 
|  | tristate "Nvidia Tegra20 Serial flash Controller" | 
|  | depends on ARCH_TEGRA || COMPILE_TEST | 
|  | depends on RESET_CONTROLLER | 
|  | help | 
|  | SPI driver for Nvidia Tegra20 Serial flash Controller interface. | 
|  | The main usecase of this controller is to use spi flash as boot | 
|  | device. | 
|  |  | 
|  | config SPI_TEGRA20_SLINK | 
|  | tristate "Nvidia Tegra20/Tegra30 SLINK Controller" | 
|  | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST | 
|  | depends on RESET_CONTROLLER | 
|  | help | 
|  | SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface. | 
|  |  | 
|  | config SPI_THUNDERX | 
|  | tristate "Cavium ThunderX SPI controller" | 
|  | depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) | 
|  | help | 
|  | SPI host driver for the hardware found on Cavium ThunderX | 
|  | SOCs. | 
|  |  | 
|  | config SPI_TOPCLIFF_PCH | 
|  | tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI" | 
|  | depends on PCI && (X86_32 || MIPS || COMPILE_TEST) | 
|  | help | 
|  | SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus | 
|  | used in some x86 embedded processors. | 
|  |  | 
|  | This driver also supports the ML7213/ML7223/ML7831, a companion chip | 
|  | for the Atom E6xx series and compatible with the Intel EG20T PCH. | 
|  |  | 
|  | config SPI_UNIPHIER | 
|  | tristate "Socionext UniPhier SPI Controller" | 
|  | depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF | 
|  | depends on HAS_IOMEM | 
|  | help | 
|  | This enables a driver for the Socionext UniPhier SoC SCSSI SPI controller. | 
|  |  | 
|  | UniPhier SoCs have SCSSI and MCSSI SPI controllers. | 
|  | Every UniPhier SoC has SCSSI which supports single channel. | 
|  | Older UniPhier Pro4/Pro5 also has MCSSI which support multiple channels. | 
|  | This driver supports SCSSI only. | 
|  |  | 
|  | If your SoC supports SCSSI, say Y here. | 
|  |  | 
|  | config SPI_XCOMM | 
|  | tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" | 
|  | depends on I2C | 
|  | help | 
|  | Support for the SPI-I2C bridge found on the Analog Devices | 
|  | AD-FMCOMMS1-EBZ board. | 
|  |  | 
|  | config SPI_XILINX | 
|  | tristate "Xilinx SPI controller common module" | 
|  | depends on HAS_IOMEM | 
|  | select SPI_BITBANG | 
|  | help | 
|  | This exposes the SPI controller IP from the Xilinx EDK. | 
|  |  | 
|  | See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" | 
|  | Product Specification document (DS464) for hardware details. | 
|  |  | 
|  | Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" | 
|  |  | 
|  | config SPI_XLP | 
|  | tristate "Cavium ThunderX2 SPI controller driver" | 
|  | depends on ARCH_THUNDER2 || COMPILE_TEST | 
|  | help | 
|  | Enable support for the SPI controller on the Cavium ThunderX2. | 
|  | (Originally on Netlogic XLP SoCs.) | 
|  |  | 
|  | If you have a Cavium ThunderX2 platform say Y here. | 
|  | If unsure, say N. | 
|  |  | 
|  | config SPI_XTENSA_XTFPGA | 
|  | tristate "Xtensa SPI controller for xtfpga" | 
|  | depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST | 
|  | select SPI_BITBANG | 
|  | help | 
|  | SPI driver for xtfpga SPI master controller. | 
|  |  | 
|  | This simple SPI master controller is built into xtfpga bitstreams | 
|  | and is used to control daughterboard audio codec. It always transfers | 
|  | 16 bit words in SPI mode 0, automatically asserting CS on transfer | 
|  | start and deasserting on end. | 
|  |  | 
|  | config SPI_ZYNQ_QSPI | 
|  | tristate "Xilinx Zynq QSPI controller" | 
|  | depends on ARCH_ZYNQ || COMPILE_TEST | 
|  | help | 
|  | This enables support for the Zynq Quad SPI controller | 
|  | in master mode. | 
|  | This controller only supports SPI memory interface. | 
|  |  | 
|  | config SPI_ZYNQMP_GQSPI | 
|  | tristate "Xilinx ZynqMP GQSPI controller" | 
|  | depends on (SPI_MASTER && HAS_DMA) || COMPILE_TEST | 
|  | help | 
|  | Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC. | 
|  |  | 
|  | config SPI_AMD | 
|  | tristate "AMD SPI controller" | 
|  | depends on SPI_MASTER || COMPILE_TEST | 
|  | help | 
|  | Enables SPI controller driver for AMD SoC. | 
|  |  | 
|  | # | 
|  | # Add new SPI master controllers in alphabetical order above this line | 
|  | # | 
|  |  | 
|  | comment "SPI Multiplexer support" | 
|  |  | 
|  | config SPI_MUX | 
|  | tristate "SPI multiplexer support" | 
|  | select MULTIPLEXER | 
|  | help | 
|  | This adds support for SPI multiplexers. Each SPI mux will be | 
|  | accessible as a SPI controller, the devices behind the mux will appear | 
|  | to be chip selects on this controller. It is still necessary to | 
|  | select one or more specific mux-controller drivers. | 
|  |  | 
|  | # | 
|  | # There are lots of SPI device types, with sensors and memory | 
|  | # being probably the most widely used ones. | 
|  | # | 
|  | comment "SPI Protocol Masters" | 
|  |  | 
|  | config SPI_SPIDEV | 
|  | tristate "User mode SPI device driver support" | 
|  | help | 
|  | This supports user mode SPI protocol drivers. | 
|  |  | 
|  | config SPI_LOOPBACK_TEST | 
|  | tristate "spi loopback test framework support" | 
|  | depends on m | 
|  | help | 
|  | This enables the SPI loopback testing framework driver | 
|  |  | 
|  | primarily used for development of spi_master drivers | 
|  | and to detect regressions | 
|  |  | 
|  | config SPI_TLE62X0 | 
|  | tristate "Infineon TLE62X0 (for power switching)" | 
|  | depends on SYSFS | 
|  | help | 
|  | SPI driver for Infineon TLE62X0 series line driver chips, | 
|  | such as the TLE6220, TLE6230 and TLE6240.  This provides a | 
|  | sysfs interface, with each line presented as a kind of GPIO | 
|  | exposing both switch control and diagnostic feedback. | 
|  |  | 
|  | # | 
|  | # Add new SPI protocol masters in alphabetical order above this line | 
|  | # | 
|  |  | 
|  | endif # SPI_MASTER | 
|  |  | 
|  | # | 
|  | # SLAVE side ... listening to other SPI masters | 
|  | # | 
|  |  | 
|  | config SPI_SLAVE | 
|  | bool "SPI slave protocol handlers" | 
|  | help | 
|  | If your system has a slave-capable SPI controller, you can enable | 
|  | slave protocol handlers. | 
|  |  | 
|  | if SPI_SLAVE | 
|  |  | 
|  | config SPI_SLAVE_TIME | 
|  | tristate "SPI slave handler reporting boot up time" | 
|  | help | 
|  | SPI slave handler responding with the time of reception of the last | 
|  | SPI message. | 
|  |  | 
|  | config SPI_SLAVE_SYSTEM_CONTROL | 
|  | tristate "SPI slave handler controlling system state" | 
|  | help | 
|  | SPI slave handler to allow remote control of system reboot, power | 
|  | off, halt, and suspend. | 
|  |  | 
|  | endif # SPI_SLAVE | 
|  |  | 
|  | config SPI_DYNAMIC | 
|  | def_bool ACPI || OF_DYNAMIC || SPI_SLAVE | 
|  |  | 
|  | endif # SPI |