| /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ |
| /* Copyright(c) 2007 - 2011 Realtek Corporation. */ |
| |
| #ifndef __ODM_REGDEFINE11N_H__ |
| #define __ODM_REGDEFINE11N_H__ |
| |
| /* 2 BB REG LIST */ |
| /* PAGE 8 */ |
| #define ODM_REG_TX_ANT_CTRL_11N 0x80C |
| #define ODM_REG_RX_DEFUALT_A_11N 0x858 |
| #define ODM_REG_ANTSEL_CTRL_11N 0x860 |
| #define ODM_REG_RX_ANT_CTRL_11N 0x864 |
| #define ODM_REG_PIN_CTRL_11N 0x870 |
| #define ODM_REG_SC_CNT_11N 0x8C4 |
| /* PAGE 9 */ |
| #define ODM_REG_ANT_MAPPING1_11N 0x914 |
| /* PAGE A */ |
| #define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00 |
| #define ODM_REG_CCK_CCA_11N 0xA0A |
| #define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C |
| #define ODM_REG_CCK_FA_RST_11N 0xA2C |
| #define ODM_REG_CCK_FA_MSB_11N 0xA58 |
| #define ODM_REG_CCK_FA_LSB_11N 0xA5C |
| #define ODM_REG_CCK_CCA_CNT_11N 0xA60 |
| #define ODM_REG_BB_PWR_SAV4_11N 0xA74 |
| /* PAGE B */ |
| #define ODM_REG_LNA_SWITCH_11N 0xB2C |
| /* PAGE C */ |
| #define ODM_REG_OFDM_FA_HOLDC_11N 0xC00 |
| #define ODM_REG_OFDM_FA_RSTC_11N 0xC0C |
| #define ODM_REG_IGI_A_11N 0xC50 |
| #define ODM_REG_ANTDIV_PARA1_11N 0xCA4 |
| #define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0 |
| /* PAGE D */ |
| #define ODM_REG_OFDM_FA_RSTD_11N 0xD00 |
| #define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0 |
| #define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4 |
| #define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8 |
| |
| /* 2 MAC REG LIST */ |
| #define ODM_REG_ANTSEL_PIN_11N 0x4C |
| #define ODM_REG_RESP_TX_11N 0x6D8 |
| |
| /* DIG Related */ |
| #define ODM_BIT_IGI_11N 0x0000007F |
| |
| #endif |
