| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright 2022 Gateworks Corporation |
| * |
| * GW72xx RS232 with RTS/CTS hardware flow control: |
| * - GPIO4_0 rs485_en needs to be driven low (in-active) |
| * - UART4_TX becomes RTS |
| * - UART4_RX becomes CTS |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| |
| #include "imx8mm-pinfunc.h" |
| |
| /dts-v1/; |
| /plugin/; |
| |
| &{/} { |
| compatible = "gw,imx8mm-gw72xx-0x"; |
| }; |
| |
| &gpio4 { |
| rs485_en { |
| gpio-hog; |
| gpios = <0 GPIO_ACTIVE_HIGH>; |
| output-low; |
| line-name = "rs485_en"; |
| }; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>; |
| cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; |
| uart-has-rtscts; |
| status = "okay"; |
| }; |
| |
| &uart4 { |
| status = "disabled"; |
| }; |
| |
| &iomuxc { |
| pinctrl_uart2: uart2grp { |
| fsl,pins = < |
| MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 |
| MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 |
| MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140 |
| MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x140 |
| >; |
| }; |
| }; |
