Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A31 CMOS Sensor Interface (CSI) Device Tree Bindings

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

properties:
  compatible:
    enum:
      - allwinner,sun6i-a31-csi
      - allwinner,sun8i-a83t-csi
      - allwinner,sun8i-h3-csi
      - allwinner,sun8i-v3s-csi
      - allwinner,sun50i-a64-csi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: Bus Clock
      - description: Module Clock
      - description: DRAM Clock

  clock-names:
    items:
      - const: bus
      - const: mod
      - const: ram

  resets:
    maxItems: 1

  # See ./video-interfaces.txt for details
  port:
    type: object

    properties:
      endpoint:
        type: object

        properties:
          remote-endpoint: true

          bus-width:
            enum: [ 8, 10, 12, 16 ]

          pclk-sample: true
          hsync-active: true
          vsync-active: true

        required:
          - bus-width
          - remote-endpoint

    required:
      - endpoint

    additionalProperties: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/sun8i-v3s-ccu.h>
    #include <dt-bindings/reset/sun8i-v3s-ccu.h>

    csi1: csi@1cb4000 {
        compatible = "allwinner,sun8i-v3s-csi";
        reg = <0x01cb4000 0x1000>;
        interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&ccu CLK_BUS_CSI>,
                 <&ccu CLK_CSI1_SCLK>,
                 <&ccu CLK_DRAM_CSI>;
        clock-names = "bus",
                      "mod",
                      "ram";
        resets = <&ccu RST_BUS_CSI>;

        port {
            /* Parallel bus endpoint */
            csi1_ep: endpoint {
                remote-endpoint = <&adv7611_ep>;
                bus-width = <16>;

                /*
                 * If hsync-active/vsync-active are missing,
                 * embedded BT.656 sync is used.
                 */
                 hsync-active = <0>; /* Active low */
                 vsync-active = <0>; /* Active low */
                 pclk-sample = <1>;  /* Rising */
            };
        };
    };

...