Thomas Gleixner | 0fdebc5 | 2022-06-07 16:11:14 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 2 | /* |
| 3 | * TI DA830/OMAP L137 chip specific setup |
| 4 | * |
| 5 | * Author: Mark A. Greer <mgreer@mvista.com> |
| 6 | * |
Thomas Gleixner | 0fdebc5 | 2022-06-07 16:11:14 +0200 | [diff] [blame] | 7 | * 2009 (c) MontaVista Software, Inc. |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 8 | */ |
David Lechner | 3952af1 | 2018-05-18 11:48:07 -0500 | [diff] [blame] | 9 | #include <linux/clk-provider.h> |
| 10 | #include <linux/clk/davinci.h> |
Russell King | 2f8163b | 2011-07-26 10:53:52 +0100 | [diff] [blame] | 11 | #include <linux/gpio.h> |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 12 | #include <linux/init.h> |
Stephen Boyd | 62e59c4 | 2019-04-18 15:20:22 -0700 | [diff] [blame] | 13 | #include <linux/io.h> |
Bartosz Golaszewski | 47b7c61 | 2019-02-14 15:52:20 +0100 | [diff] [blame] | 14 | #include <linux/irqchip/irq-davinci-cp-intc.h> |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 15 | |
Bartosz Golaszewski | a248f52 | 2019-07-22 15:17:42 +0200 | [diff] [blame] | 16 | #include <clocksource/timer-davinci.h> |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 17 | |
Arnd Bergmann | ca31807 | 2022-04-28 09:32:09 +0200 | [diff] [blame] | 18 | #include <asm/mach/map.h> |
| 19 | |
| 20 | #include "common.h" |
| 21 | #include "cputype.h" |
| 22 | #include "da8xx.h" |
Bartosz Golaszewski | 544ca0b | 2019-02-14 15:52:03 +0100 | [diff] [blame] | 23 | #include "irqs.h" |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 24 | #include "mux.h" |
| 25 | |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 26 | /* Offsets of the 8 compare registers on the da830 */ |
| 27 | #define DA830_CMP12_0 0x60 |
| 28 | #define DA830_CMP12_1 0x64 |
| 29 | #define DA830_CMP12_2 0x68 |
| 30 | #define DA830_CMP12_3 0x6c |
| 31 | #define DA830_CMP12_4 0x70 |
| 32 | #define DA830_CMP12_5 0x74 |
| 33 | #define DA830_CMP12_6 0x78 |
| 34 | #define DA830_CMP12_7 0x7c |
| 35 | |
| 36 | #define DA830_REF_FREQ 24000000 |
| 37 | |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 38 | /* |
| 39 | * Device specific mux setup |
| 40 | * |
| 41 | * soc description mux mode mode mux dbg |
| 42 | * reg offset mask mode |
| 43 | */ |
| 44 | static const struct mux_config da830_pins[] = { |
| 45 | #ifdef CONFIG_DAVINCI_MUX |
| 46 | MUX_CFG(DA830, GPIO7_14, 0, 0, 0xf, 1, false) |
| 47 | MUX_CFG(DA830, RTCK, 0, 0, 0xf, 8, false) |
| 48 | MUX_CFG(DA830, GPIO7_15, 0, 4, 0xf, 1, false) |
| 49 | MUX_CFG(DA830, EMU_0, 0, 4, 0xf, 8, false) |
| 50 | MUX_CFG(DA830, EMB_SDCKE, 0, 8, 0xf, 1, false) |
| 51 | MUX_CFG(DA830, EMB_CLK_GLUE, 0, 12, 0xf, 1, false) |
| 52 | MUX_CFG(DA830, EMB_CLK, 0, 12, 0xf, 2, false) |
| 53 | MUX_CFG(DA830, NEMB_CS_0, 0, 16, 0xf, 1, false) |
| 54 | MUX_CFG(DA830, NEMB_CAS, 0, 20, 0xf, 1, false) |
| 55 | MUX_CFG(DA830, NEMB_RAS, 0, 24, 0xf, 1, false) |
| 56 | MUX_CFG(DA830, NEMB_WE, 0, 28, 0xf, 1, false) |
| 57 | MUX_CFG(DA830, EMB_BA_1, 1, 0, 0xf, 1, false) |
| 58 | MUX_CFG(DA830, EMB_BA_0, 1, 4, 0xf, 1, false) |
| 59 | MUX_CFG(DA830, EMB_A_0, 1, 8, 0xf, 1, false) |
| 60 | MUX_CFG(DA830, EMB_A_1, 1, 12, 0xf, 1, false) |
| 61 | MUX_CFG(DA830, EMB_A_2, 1, 16, 0xf, 1, false) |
| 62 | MUX_CFG(DA830, EMB_A_3, 1, 20, 0xf, 1, false) |
| 63 | MUX_CFG(DA830, EMB_A_4, 1, 24, 0xf, 1, false) |
| 64 | MUX_CFG(DA830, EMB_A_5, 1, 28, 0xf, 1, false) |
| 65 | MUX_CFG(DA830, GPIO7_0, 1, 0, 0xf, 8, false) |
| 66 | MUX_CFG(DA830, GPIO7_1, 1, 4, 0xf, 8, false) |
| 67 | MUX_CFG(DA830, GPIO7_2, 1, 8, 0xf, 8, false) |
| 68 | MUX_CFG(DA830, GPIO7_3, 1, 12, 0xf, 8, false) |
| 69 | MUX_CFG(DA830, GPIO7_4, 1, 16, 0xf, 8, false) |
| 70 | MUX_CFG(DA830, GPIO7_5, 1, 20, 0xf, 8, false) |
| 71 | MUX_CFG(DA830, GPIO7_6, 1, 24, 0xf, 8, false) |
| 72 | MUX_CFG(DA830, GPIO7_7, 1, 28, 0xf, 8, false) |
| 73 | MUX_CFG(DA830, EMB_A_6, 2, 0, 0xf, 1, false) |
| 74 | MUX_CFG(DA830, EMB_A_7, 2, 4, 0xf, 1, false) |
| 75 | MUX_CFG(DA830, EMB_A_8, 2, 8, 0xf, 1, false) |
| 76 | MUX_CFG(DA830, EMB_A_9, 2, 12, 0xf, 1, false) |
| 77 | MUX_CFG(DA830, EMB_A_10, 2, 16, 0xf, 1, false) |
| 78 | MUX_CFG(DA830, EMB_A_11, 2, 20, 0xf, 1, false) |
| 79 | MUX_CFG(DA830, EMB_A_12, 2, 24, 0xf, 1, false) |
| 80 | MUX_CFG(DA830, EMB_D_31, 2, 28, 0xf, 1, false) |
| 81 | MUX_CFG(DA830, GPIO7_8, 2, 0, 0xf, 8, false) |
| 82 | MUX_CFG(DA830, GPIO7_9, 2, 4, 0xf, 8, false) |
| 83 | MUX_CFG(DA830, GPIO7_10, 2, 8, 0xf, 8, false) |
| 84 | MUX_CFG(DA830, GPIO7_11, 2, 12, 0xf, 8, false) |
| 85 | MUX_CFG(DA830, GPIO7_12, 2, 16, 0xf, 8, false) |
| 86 | MUX_CFG(DA830, GPIO7_13, 2, 20, 0xf, 8, false) |
| 87 | MUX_CFG(DA830, GPIO3_13, 2, 24, 0xf, 8, false) |
| 88 | MUX_CFG(DA830, EMB_D_30, 3, 0, 0xf, 1, false) |
| 89 | MUX_CFG(DA830, EMB_D_29, 3, 4, 0xf, 1, false) |
| 90 | MUX_CFG(DA830, EMB_D_28, 3, 8, 0xf, 1, false) |
| 91 | MUX_CFG(DA830, EMB_D_27, 3, 12, 0xf, 1, false) |
| 92 | MUX_CFG(DA830, EMB_D_26, 3, 16, 0xf, 1, false) |
| 93 | MUX_CFG(DA830, EMB_D_25, 3, 20, 0xf, 1, false) |
| 94 | MUX_CFG(DA830, EMB_D_24, 3, 24, 0xf, 1, false) |
| 95 | MUX_CFG(DA830, EMB_D_23, 3, 28, 0xf, 1, false) |
| 96 | MUX_CFG(DA830, EMB_D_22, 4, 0, 0xf, 1, false) |
| 97 | MUX_CFG(DA830, EMB_D_21, 4, 4, 0xf, 1, false) |
| 98 | MUX_CFG(DA830, EMB_D_20, 4, 8, 0xf, 1, false) |
| 99 | MUX_CFG(DA830, EMB_D_19, 4, 12, 0xf, 1, false) |
| 100 | MUX_CFG(DA830, EMB_D_18, 4, 16, 0xf, 1, false) |
| 101 | MUX_CFG(DA830, EMB_D_17, 4, 20, 0xf, 1, false) |
| 102 | MUX_CFG(DA830, EMB_D_16, 4, 24, 0xf, 1, false) |
| 103 | MUX_CFG(DA830, NEMB_WE_DQM_3, 4, 28, 0xf, 1, false) |
| 104 | MUX_CFG(DA830, NEMB_WE_DQM_2, 5, 0, 0xf, 1, false) |
| 105 | MUX_CFG(DA830, EMB_D_0, 5, 4, 0xf, 1, false) |
| 106 | MUX_CFG(DA830, EMB_D_1, 5, 8, 0xf, 1, false) |
| 107 | MUX_CFG(DA830, EMB_D_2, 5, 12, 0xf, 1, false) |
| 108 | MUX_CFG(DA830, EMB_D_3, 5, 16, 0xf, 1, false) |
| 109 | MUX_CFG(DA830, EMB_D_4, 5, 20, 0xf, 1, false) |
| 110 | MUX_CFG(DA830, EMB_D_5, 5, 24, 0xf, 1, false) |
| 111 | MUX_CFG(DA830, EMB_D_6, 5, 28, 0xf, 1, false) |
| 112 | MUX_CFG(DA830, GPIO6_0, 5, 4, 0xf, 8, false) |
| 113 | MUX_CFG(DA830, GPIO6_1, 5, 8, 0xf, 8, false) |
| 114 | MUX_CFG(DA830, GPIO6_2, 5, 12, 0xf, 8, false) |
| 115 | MUX_CFG(DA830, GPIO6_3, 5, 16, 0xf, 8, false) |
| 116 | MUX_CFG(DA830, GPIO6_4, 5, 20, 0xf, 8, false) |
| 117 | MUX_CFG(DA830, GPIO6_5, 5, 24, 0xf, 8, false) |
| 118 | MUX_CFG(DA830, GPIO6_6, 5, 28, 0xf, 8, false) |
| 119 | MUX_CFG(DA830, EMB_D_7, 6, 0, 0xf, 1, false) |
| 120 | MUX_CFG(DA830, EMB_D_8, 6, 4, 0xf, 1, false) |
| 121 | MUX_CFG(DA830, EMB_D_9, 6, 8, 0xf, 1, false) |
| 122 | MUX_CFG(DA830, EMB_D_10, 6, 12, 0xf, 1, false) |
| 123 | MUX_CFG(DA830, EMB_D_11, 6, 16, 0xf, 1, false) |
| 124 | MUX_CFG(DA830, EMB_D_12, 6, 20, 0xf, 1, false) |
| 125 | MUX_CFG(DA830, EMB_D_13, 6, 24, 0xf, 1, false) |
| 126 | MUX_CFG(DA830, EMB_D_14, 6, 28, 0xf, 1, false) |
| 127 | MUX_CFG(DA830, GPIO6_7, 6, 0, 0xf, 8, false) |
| 128 | MUX_CFG(DA830, GPIO6_8, 6, 4, 0xf, 8, false) |
| 129 | MUX_CFG(DA830, GPIO6_9, 6, 8, 0xf, 8, false) |
| 130 | MUX_CFG(DA830, GPIO6_10, 6, 12, 0xf, 8, false) |
| 131 | MUX_CFG(DA830, GPIO6_11, 6, 16, 0xf, 8, false) |
| 132 | MUX_CFG(DA830, GPIO6_12, 6, 20, 0xf, 8, false) |
| 133 | MUX_CFG(DA830, GPIO6_13, 6, 24, 0xf, 8, false) |
| 134 | MUX_CFG(DA830, GPIO6_14, 6, 28, 0xf, 8, false) |
| 135 | MUX_CFG(DA830, EMB_D_15, 7, 0, 0xf, 1, false) |
| 136 | MUX_CFG(DA830, NEMB_WE_DQM_1, 7, 4, 0xf, 1, false) |
| 137 | MUX_CFG(DA830, NEMB_WE_DQM_0, 7, 8, 0xf, 1, false) |
| 138 | MUX_CFG(DA830, SPI0_SOMI_0, 7, 12, 0xf, 1, false) |
| 139 | MUX_CFG(DA830, SPI0_SIMO_0, 7, 16, 0xf, 1, false) |
| 140 | MUX_CFG(DA830, SPI0_CLK, 7, 20, 0xf, 1, false) |
| 141 | MUX_CFG(DA830, NSPI0_ENA, 7, 24, 0xf, 1, false) |
| 142 | MUX_CFG(DA830, NSPI0_SCS_0, 7, 28, 0xf, 1, false) |
| 143 | MUX_CFG(DA830, EQEP0I, 7, 12, 0xf, 2, false) |
| 144 | MUX_CFG(DA830, EQEP0S, 7, 16, 0xf, 2, false) |
| 145 | MUX_CFG(DA830, EQEP1I, 7, 20, 0xf, 2, false) |
| 146 | MUX_CFG(DA830, NUART0_CTS, 7, 24, 0xf, 2, false) |
| 147 | MUX_CFG(DA830, NUART0_RTS, 7, 28, 0xf, 2, false) |
| 148 | MUX_CFG(DA830, EQEP0A, 7, 24, 0xf, 4, false) |
| 149 | MUX_CFG(DA830, EQEP0B, 7, 28, 0xf, 4, false) |
| 150 | MUX_CFG(DA830, GPIO6_15, 7, 0, 0xf, 8, false) |
| 151 | MUX_CFG(DA830, GPIO5_14, 7, 4, 0xf, 8, false) |
| 152 | MUX_CFG(DA830, GPIO5_15, 7, 8, 0xf, 8, false) |
| 153 | MUX_CFG(DA830, GPIO5_0, 7, 12, 0xf, 8, false) |
| 154 | MUX_CFG(DA830, GPIO5_1, 7, 16, 0xf, 8, false) |
| 155 | MUX_CFG(DA830, GPIO5_2, 7, 20, 0xf, 8, false) |
| 156 | MUX_CFG(DA830, GPIO5_3, 7, 24, 0xf, 8, false) |
| 157 | MUX_CFG(DA830, GPIO5_4, 7, 28, 0xf, 8, false) |
| 158 | MUX_CFG(DA830, SPI1_SOMI_0, 8, 0, 0xf, 1, false) |
| 159 | MUX_CFG(DA830, SPI1_SIMO_0, 8, 4, 0xf, 1, false) |
| 160 | MUX_CFG(DA830, SPI1_CLK, 8, 8, 0xf, 1, false) |
| 161 | MUX_CFG(DA830, UART0_RXD, 8, 12, 0xf, 1, false) |
| 162 | MUX_CFG(DA830, UART0_TXD, 8, 16, 0xf, 1, false) |
| 163 | MUX_CFG(DA830, AXR1_10, 8, 20, 0xf, 1, false) |
| 164 | MUX_CFG(DA830, AXR1_11, 8, 24, 0xf, 1, false) |
| 165 | MUX_CFG(DA830, NSPI1_ENA, 8, 28, 0xf, 1, false) |
| 166 | MUX_CFG(DA830, I2C1_SCL, 8, 0, 0xf, 2, false) |
| 167 | MUX_CFG(DA830, I2C1_SDA, 8, 4, 0xf, 2, false) |
| 168 | MUX_CFG(DA830, EQEP1S, 8, 8, 0xf, 2, false) |
| 169 | MUX_CFG(DA830, I2C0_SDA, 8, 12, 0xf, 2, false) |
| 170 | MUX_CFG(DA830, I2C0_SCL, 8, 16, 0xf, 2, false) |
| 171 | MUX_CFG(DA830, UART2_RXD, 8, 28, 0xf, 2, false) |
| 172 | MUX_CFG(DA830, TM64P0_IN12, 8, 12, 0xf, 4, false) |
| 173 | MUX_CFG(DA830, TM64P0_OUT12, 8, 16, 0xf, 4, false) |
| 174 | MUX_CFG(DA830, GPIO5_5, 8, 0, 0xf, 8, false) |
| 175 | MUX_CFG(DA830, GPIO5_6, 8, 4, 0xf, 8, false) |
| 176 | MUX_CFG(DA830, GPIO5_7, 8, 8, 0xf, 8, false) |
| 177 | MUX_CFG(DA830, GPIO5_8, 8, 12, 0xf, 8, false) |
| 178 | MUX_CFG(DA830, GPIO5_9, 8, 16, 0xf, 8, false) |
| 179 | MUX_CFG(DA830, GPIO5_10, 8, 20, 0xf, 8, false) |
| 180 | MUX_CFG(DA830, GPIO5_11, 8, 24, 0xf, 8, false) |
| 181 | MUX_CFG(DA830, GPIO5_12, 8, 28, 0xf, 8, false) |
| 182 | MUX_CFG(DA830, NSPI1_SCS_0, 9, 0, 0xf, 1, false) |
| 183 | MUX_CFG(DA830, USB0_DRVVBUS, 9, 4, 0xf, 1, false) |
| 184 | MUX_CFG(DA830, AHCLKX0, 9, 8, 0xf, 1, false) |
| 185 | MUX_CFG(DA830, ACLKX0, 9, 12, 0xf, 1, false) |
| 186 | MUX_CFG(DA830, AFSX0, 9, 16, 0xf, 1, false) |
| 187 | MUX_CFG(DA830, AHCLKR0, 9, 20, 0xf, 1, false) |
| 188 | MUX_CFG(DA830, ACLKR0, 9, 24, 0xf, 1, false) |
| 189 | MUX_CFG(DA830, AFSR0, 9, 28, 0xf, 1, false) |
| 190 | MUX_CFG(DA830, UART2_TXD, 9, 0, 0xf, 2, false) |
| 191 | MUX_CFG(DA830, AHCLKX2, 9, 8, 0xf, 2, false) |
| 192 | MUX_CFG(DA830, ECAP0_APWM0, 9, 12, 0xf, 2, false) |
| 193 | MUX_CFG(DA830, RMII_MHZ_50_CLK, 9, 20, 0xf, 2, false) |
| 194 | MUX_CFG(DA830, ECAP1_APWM1, 9, 24, 0xf, 2, false) |
| 195 | MUX_CFG(DA830, USB_REFCLKIN, 9, 8, 0xf, 4, false) |
| 196 | MUX_CFG(DA830, GPIO5_13, 9, 0, 0xf, 8, false) |
| 197 | MUX_CFG(DA830, GPIO4_15, 9, 4, 0xf, 8, false) |
| 198 | MUX_CFG(DA830, GPIO2_11, 9, 8, 0xf, 8, false) |
| 199 | MUX_CFG(DA830, GPIO2_12, 9, 12, 0xf, 8, false) |
| 200 | MUX_CFG(DA830, GPIO2_13, 9, 16, 0xf, 8, false) |
| 201 | MUX_CFG(DA830, GPIO2_14, 9, 20, 0xf, 8, false) |
| 202 | MUX_CFG(DA830, GPIO2_15, 9, 24, 0xf, 8, false) |
| 203 | MUX_CFG(DA830, GPIO3_12, 9, 28, 0xf, 8, false) |
| 204 | MUX_CFG(DA830, AMUTE0, 10, 0, 0xf, 1, false) |
| 205 | MUX_CFG(DA830, AXR0_0, 10, 4, 0xf, 1, false) |
| 206 | MUX_CFG(DA830, AXR0_1, 10, 8, 0xf, 1, false) |
| 207 | MUX_CFG(DA830, AXR0_2, 10, 12, 0xf, 1, false) |
| 208 | MUX_CFG(DA830, AXR0_3, 10, 16, 0xf, 1, false) |
| 209 | MUX_CFG(DA830, AXR0_4, 10, 20, 0xf, 1, false) |
| 210 | MUX_CFG(DA830, AXR0_5, 10, 24, 0xf, 1, false) |
| 211 | MUX_CFG(DA830, AXR0_6, 10, 28, 0xf, 1, false) |
| 212 | MUX_CFG(DA830, RMII_TXD_0, 10, 4, 0xf, 2, false) |
| 213 | MUX_CFG(DA830, RMII_TXD_1, 10, 8, 0xf, 2, false) |
| 214 | MUX_CFG(DA830, RMII_TXEN, 10, 12, 0xf, 2, false) |
| 215 | MUX_CFG(DA830, RMII_CRS_DV, 10, 16, 0xf, 2, false) |
| 216 | MUX_CFG(DA830, RMII_RXD_0, 10, 20, 0xf, 2, false) |
| 217 | MUX_CFG(DA830, RMII_RXD_1, 10, 24, 0xf, 2, false) |
| 218 | MUX_CFG(DA830, RMII_RXER, 10, 28, 0xf, 2, false) |
| 219 | MUX_CFG(DA830, AFSR2, 10, 4, 0xf, 4, false) |
| 220 | MUX_CFG(DA830, ACLKX2, 10, 8, 0xf, 4, false) |
| 221 | MUX_CFG(DA830, AXR2_3, 10, 12, 0xf, 4, false) |
| 222 | MUX_CFG(DA830, AXR2_2, 10, 16, 0xf, 4, false) |
| 223 | MUX_CFG(DA830, AXR2_1, 10, 20, 0xf, 4, false) |
| 224 | MUX_CFG(DA830, AFSX2, 10, 24, 0xf, 4, false) |
| 225 | MUX_CFG(DA830, ACLKR2, 10, 28, 0xf, 4, false) |
| 226 | MUX_CFG(DA830, NRESETOUT, 10, 0, 0xf, 8, false) |
| 227 | MUX_CFG(DA830, GPIO3_0, 10, 4, 0xf, 8, false) |
| 228 | MUX_CFG(DA830, GPIO3_1, 10, 8, 0xf, 8, false) |
| 229 | MUX_CFG(DA830, GPIO3_2, 10, 12, 0xf, 8, false) |
| 230 | MUX_CFG(DA830, GPIO3_3, 10, 16, 0xf, 8, false) |
| 231 | MUX_CFG(DA830, GPIO3_4, 10, 20, 0xf, 8, false) |
| 232 | MUX_CFG(DA830, GPIO3_5, 10, 24, 0xf, 8, false) |
| 233 | MUX_CFG(DA830, GPIO3_6, 10, 28, 0xf, 8, false) |
| 234 | MUX_CFG(DA830, AXR0_7, 11, 0, 0xf, 1, false) |
| 235 | MUX_CFG(DA830, AXR0_8, 11, 4, 0xf, 1, false) |
| 236 | MUX_CFG(DA830, UART1_RXD, 11, 8, 0xf, 1, false) |
| 237 | MUX_CFG(DA830, UART1_TXD, 11, 12, 0xf, 1, false) |
| 238 | MUX_CFG(DA830, AXR0_11, 11, 16, 0xf, 1, false) |
| 239 | MUX_CFG(DA830, AHCLKX1, 11, 20, 0xf, 1, false) |
| 240 | MUX_CFG(DA830, ACLKX1, 11, 24, 0xf, 1, false) |
| 241 | MUX_CFG(DA830, AFSX1, 11, 28, 0xf, 1, false) |
| 242 | MUX_CFG(DA830, MDIO_CLK, 11, 0, 0xf, 2, false) |
| 243 | MUX_CFG(DA830, MDIO_D, 11, 4, 0xf, 2, false) |
| 244 | MUX_CFG(DA830, AXR0_9, 11, 8, 0xf, 2, false) |
| 245 | MUX_CFG(DA830, AXR0_10, 11, 12, 0xf, 2, false) |
| 246 | MUX_CFG(DA830, EPWM0B, 11, 20, 0xf, 2, false) |
| 247 | MUX_CFG(DA830, EPWM0A, 11, 24, 0xf, 2, false) |
| 248 | MUX_CFG(DA830, EPWMSYNCI, 11, 28, 0xf, 2, false) |
| 249 | MUX_CFG(DA830, AXR2_0, 11, 16, 0xf, 4, false) |
| 250 | MUX_CFG(DA830, EPWMSYNC0, 11, 28, 0xf, 4, false) |
| 251 | MUX_CFG(DA830, GPIO3_7, 11, 0, 0xf, 8, false) |
| 252 | MUX_CFG(DA830, GPIO3_8, 11, 4, 0xf, 8, false) |
| 253 | MUX_CFG(DA830, GPIO3_9, 11, 8, 0xf, 8, false) |
| 254 | MUX_CFG(DA830, GPIO3_10, 11, 12, 0xf, 8, false) |
| 255 | MUX_CFG(DA830, GPIO3_11, 11, 16, 0xf, 8, false) |
| 256 | MUX_CFG(DA830, GPIO3_14, 11, 20, 0xf, 8, false) |
| 257 | MUX_CFG(DA830, GPIO3_15, 11, 24, 0xf, 8, false) |
| 258 | MUX_CFG(DA830, GPIO4_10, 11, 28, 0xf, 8, false) |
| 259 | MUX_CFG(DA830, AHCLKR1, 12, 0, 0xf, 1, false) |
| 260 | MUX_CFG(DA830, ACLKR1, 12, 4, 0xf, 1, false) |
| 261 | MUX_CFG(DA830, AFSR1, 12, 8, 0xf, 1, false) |
| 262 | MUX_CFG(DA830, AMUTE1, 12, 12, 0xf, 1, false) |
| 263 | MUX_CFG(DA830, AXR1_0, 12, 16, 0xf, 1, false) |
| 264 | MUX_CFG(DA830, AXR1_1, 12, 20, 0xf, 1, false) |
| 265 | MUX_CFG(DA830, AXR1_2, 12, 24, 0xf, 1, false) |
| 266 | MUX_CFG(DA830, AXR1_3, 12, 28, 0xf, 1, false) |
| 267 | MUX_CFG(DA830, ECAP2_APWM2, 12, 4, 0xf, 2, false) |
| 268 | MUX_CFG(DA830, EHRPWMGLUETZ, 12, 12, 0xf, 2, false) |
| 269 | MUX_CFG(DA830, EQEP1A, 12, 28, 0xf, 2, false) |
| 270 | MUX_CFG(DA830, GPIO4_11, 12, 0, 0xf, 8, false) |
| 271 | MUX_CFG(DA830, GPIO4_12, 12, 4, 0xf, 8, false) |
| 272 | MUX_CFG(DA830, GPIO4_13, 12, 8, 0xf, 8, false) |
| 273 | MUX_CFG(DA830, GPIO4_14, 12, 12, 0xf, 8, false) |
| 274 | MUX_CFG(DA830, GPIO4_0, 12, 16, 0xf, 8, false) |
| 275 | MUX_CFG(DA830, GPIO4_1, 12, 20, 0xf, 8, false) |
| 276 | MUX_CFG(DA830, GPIO4_2, 12, 24, 0xf, 8, false) |
| 277 | MUX_CFG(DA830, GPIO4_3, 12, 28, 0xf, 8, false) |
| 278 | MUX_CFG(DA830, AXR1_4, 13, 0, 0xf, 1, false) |
| 279 | MUX_CFG(DA830, AXR1_5, 13, 4, 0xf, 1, false) |
| 280 | MUX_CFG(DA830, AXR1_6, 13, 8, 0xf, 1, false) |
| 281 | MUX_CFG(DA830, AXR1_7, 13, 12, 0xf, 1, false) |
| 282 | MUX_CFG(DA830, AXR1_8, 13, 16, 0xf, 1, false) |
| 283 | MUX_CFG(DA830, AXR1_9, 13, 20, 0xf, 1, false) |
| 284 | MUX_CFG(DA830, EMA_D_0, 13, 24, 0xf, 1, false) |
| 285 | MUX_CFG(DA830, EMA_D_1, 13, 28, 0xf, 1, false) |
| 286 | MUX_CFG(DA830, EQEP1B, 13, 0, 0xf, 2, false) |
| 287 | MUX_CFG(DA830, EPWM2B, 13, 4, 0xf, 2, false) |
| 288 | MUX_CFG(DA830, EPWM2A, 13, 8, 0xf, 2, false) |
| 289 | MUX_CFG(DA830, EPWM1B, 13, 12, 0xf, 2, false) |
| 290 | MUX_CFG(DA830, EPWM1A, 13, 16, 0xf, 2, false) |
| 291 | MUX_CFG(DA830, MMCSD_DAT_0, 13, 24, 0xf, 2, false) |
| 292 | MUX_CFG(DA830, MMCSD_DAT_1, 13, 28, 0xf, 2, false) |
| 293 | MUX_CFG(DA830, UHPI_HD_0, 13, 24, 0xf, 4, false) |
| 294 | MUX_CFG(DA830, UHPI_HD_1, 13, 28, 0xf, 4, false) |
| 295 | MUX_CFG(DA830, GPIO4_4, 13, 0, 0xf, 8, false) |
| 296 | MUX_CFG(DA830, GPIO4_5, 13, 4, 0xf, 8, false) |
| 297 | MUX_CFG(DA830, GPIO4_6, 13, 8, 0xf, 8, false) |
| 298 | MUX_CFG(DA830, GPIO4_7, 13, 12, 0xf, 8, false) |
| 299 | MUX_CFG(DA830, GPIO4_8, 13, 16, 0xf, 8, false) |
| 300 | MUX_CFG(DA830, GPIO4_9, 13, 20, 0xf, 8, false) |
| 301 | MUX_CFG(DA830, GPIO0_0, 13, 24, 0xf, 8, false) |
| 302 | MUX_CFG(DA830, GPIO0_1, 13, 28, 0xf, 8, false) |
| 303 | MUX_CFG(DA830, EMA_D_2, 14, 0, 0xf, 1, false) |
| 304 | MUX_CFG(DA830, EMA_D_3, 14, 4, 0xf, 1, false) |
| 305 | MUX_CFG(DA830, EMA_D_4, 14, 8, 0xf, 1, false) |
| 306 | MUX_CFG(DA830, EMA_D_5, 14, 12, 0xf, 1, false) |
| 307 | MUX_CFG(DA830, EMA_D_6, 14, 16, 0xf, 1, false) |
| 308 | MUX_CFG(DA830, EMA_D_7, 14, 20, 0xf, 1, false) |
| 309 | MUX_CFG(DA830, EMA_D_8, 14, 24, 0xf, 1, false) |
| 310 | MUX_CFG(DA830, EMA_D_9, 14, 28, 0xf, 1, false) |
| 311 | MUX_CFG(DA830, MMCSD_DAT_2, 14, 0, 0xf, 2, false) |
| 312 | MUX_CFG(DA830, MMCSD_DAT_3, 14, 4, 0xf, 2, false) |
| 313 | MUX_CFG(DA830, MMCSD_DAT_4, 14, 8, 0xf, 2, false) |
| 314 | MUX_CFG(DA830, MMCSD_DAT_5, 14, 12, 0xf, 2, false) |
| 315 | MUX_CFG(DA830, MMCSD_DAT_6, 14, 16, 0xf, 2, false) |
| 316 | MUX_CFG(DA830, MMCSD_DAT_7, 14, 20, 0xf, 2, false) |
| 317 | MUX_CFG(DA830, UHPI_HD_8, 14, 24, 0xf, 2, false) |
| 318 | MUX_CFG(DA830, UHPI_HD_9, 14, 28, 0xf, 2, false) |
| 319 | MUX_CFG(DA830, UHPI_HD_2, 14, 0, 0xf, 4, false) |
| 320 | MUX_CFG(DA830, UHPI_HD_3, 14, 4, 0xf, 4, false) |
| 321 | MUX_CFG(DA830, UHPI_HD_4, 14, 8, 0xf, 4, false) |
| 322 | MUX_CFG(DA830, UHPI_HD_5, 14, 12, 0xf, 4, false) |
| 323 | MUX_CFG(DA830, UHPI_HD_6, 14, 16, 0xf, 4, false) |
| 324 | MUX_CFG(DA830, UHPI_HD_7, 14, 20, 0xf, 4, false) |
| 325 | MUX_CFG(DA830, LCD_D_8, 14, 24, 0xf, 4, false) |
| 326 | MUX_CFG(DA830, LCD_D_9, 14, 28, 0xf, 4, false) |
| 327 | MUX_CFG(DA830, GPIO0_2, 14, 0, 0xf, 8, false) |
| 328 | MUX_CFG(DA830, GPIO0_3, 14, 4, 0xf, 8, false) |
| 329 | MUX_CFG(DA830, GPIO0_4, 14, 8, 0xf, 8, false) |
| 330 | MUX_CFG(DA830, GPIO0_5, 14, 12, 0xf, 8, false) |
| 331 | MUX_CFG(DA830, GPIO0_6, 14, 16, 0xf, 8, false) |
| 332 | MUX_CFG(DA830, GPIO0_7, 14, 20, 0xf, 8, false) |
| 333 | MUX_CFG(DA830, GPIO0_8, 14, 24, 0xf, 8, false) |
| 334 | MUX_CFG(DA830, GPIO0_9, 14, 28, 0xf, 8, false) |
| 335 | MUX_CFG(DA830, EMA_D_10, 15, 0, 0xf, 1, false) |
| 336 | MUX_CFG(DA830, EMA_D_11, 15, 4, 0xf, 1, false) |
| 337 | MUX_CFG(DA830, EMA_D_12, 15, 8, 0xf, 1, false) |
| 338 | MUX_CFG(DA830, EMA_D_13, 15, 12, 0xf, 1, false) |
| 339 | MUX_CFG(DA830, EMA_D_14, 15, 16, 0xf, 1, false) |
| 340 | MUX_CFG(DA830, EMA_D_15, 15, 20, 0xf, 1, false) |
| 341 | MUX_CFG(DA830, EMA_A_0, 15, 24, 0xf, 1, false) |
| 342 | MUX_CFG(DA830, EMA_A_1, 15, 28, 0xf, 1, false) |
| 343 | MUX_CFG(DA830, UHPI_HD_10, 15, 0, 0xf, 2, false) |
| 344 | MUX_CFG(DA830, UHPI_HD_11, 15, 4, 0xf, 2, false) |
| 345 | MUX_CFG(DA830, UHPI_HD_12, 15, 8, 0xf, 2, false) |
| 346 | MUX_CFG(DA830, UHPI_HD_13, 15, 12, 0xf, 2, false) |
| 347 | MUX_CFG(DA830, UHPI_HD_14, 15, 16, 0xf, 2, false) |
| 348 | MUX_CFG(DA830, UHPI_HD_15, 15, 20, 0xf, 2, false) |
| 349 | MUX_CFG(DA830, LCD_D_7, 15, 24, 0xf, 2, false) |
| 350 | MUX_CFG(DA830, MMCSD_CLK, 15, 28, 0xf, 2, false) |
| 351 | MUX_CFG(DA830, LCD_D_10, 15, 0, 0xf, 4, false) |
| 352 | MUX_CFG(DA830, LCD_D_11, 15, 4, 0xf, 4, false) |
| 353 | MUX_CFG(DA830, LCD_D_12, 15, 8, 0xf, 4, false) |
| 354 | MUX_CFG(DA830, LCD_D_13, 15, 12, 0xf, 4, false) |
| 355 | MUX_CFG(DA830, LCD_D_14, 15, 16, 0xf, 4, false) |
| 356 | MUX_CFG(DA830, LCD_D_15, 15, 20, 0xf, 4, false) |
| 357 | MUX_CFG(DA830, UHPI_HCNTL0, 15, 28, 0xf, 4, false) |
| 358 | MUX_CFG(DA830, GPIO0_10, 15, 0, 0xf, 8, false) |
| 359 | MUX_CFG(DA830, GPIO0_11, 15, 4, 0xf, 8, false) |
| 360 | MUX_CFG(DA830, GPIO0_12, 15, 8, 0xf, 8, false) |
| 361 | MUX_CFG(DA830, GPIO0_13, 15, 12, 0xf, 8, false) |
| 362 | MUX_CFG(DA830, GPIO0_14, 15, 16, 0xf, 8, false) |
| 363 | MUX_CFG(DA830, GPIO0_15, 15, 20, 0xf, 8, false) |
| 364 | MUX_CFG(DA830, GPIO1_0, 15, 24, 0xf, 8, false) |
| 365 | MUX_CFG(DA830, GPIO1_1, 15, 28, 0xf, 8, false) |
| 366 | MUX_CFG(DA830, EMA_A_2, 16, 0, 0xf, 1, false) |
| 367 | MUX_CFG(DA830, EMA_A_3, 16, 4, 0xf, 1, false) |
| 368 | MUX_CFG(DA830, EMA_A_4, 16, 8, 0xf, 1, false) |
| 369 | MUX_CFG(DA830, EMA_A_5, 16, 12, 0xf, 1, false) |
| 370 | MUX_CFG(DA830, EMA_A_6, 16, 16, 0xf, 1, false) |
| 371 | MUX_CFG(DA830, EMA_A_7, 16, 20, 0xf, 1, false) |
| 372 | MUX_CFG(DA830, EMA_A_8, 16, 24, 0xf, 1, false) |
| 373 | MUX_CFG(DA830, EMA_A_9, 16, 28, 0xf, 1, false) |
| 374 | MUX_CFG(DA830, MMCSD_CMD, 16, 0, 0xf, 2, false) |
| 375 | MUX_CFG(DA830, LCD_D_6, 16, 4, 0xf, 2, false) |
| 376 | MUX_CFG(DA830, LCD_D_3, 16, 8, 0xf, 2, false) |
| 377 | MUX_CFG(DA830, LCD_D_2, 16, 12, 0xf, 2, false) |
| 378 | MUX_CFG(DA830, LCD_D_1, 16, 16, 0xf, 2, false) |
| 379 | MUX_CFG(DA830, LCD_D_0, 16, 20, 0xf, 2, false) |
| 380 | MUX_CFG(DA830, LCD_PCLK, 16, 24, 0xf, 2, false) |
| 381 | MUX_CFG(DA830, LCD_HSYNC, 16, 28, 0xf, 2, false) |
| 382 | MUX_CFG(DA830, UHPI_HCNTL1, 16, 0, 0xf, 4, false) |
| 383 | MUX_CFG(DA830, GPIO1_2, 16, 0, 0xf, 8, false) |
| 384 | MUX_CFG(DA830, GPIO1_3, 16, 4, 0xf, 8, false) |
| 385 | MUX_CFG(DA830, GPIO1_4, 16, 8, 0xf, 8, false) |
| 386 | MUX_CFG(DA830, GPIO1_5, 16, 12, 0xf, 8, false) |
| 387 | MUX_CFG(DA830, GPIO1_6, 16, 16, 0xf, 8, false) |
| 388 | MUX_CFG(DA830, GPIO1_7, 16, 20, 0xf, 8, false) |
| 389 | MUX_CFG(DA830, GPIO1_8, 16, 24, 0xf, 8, false) |
| 390 | MUX_CFG(DA830, GPIO1_9, 16, 28, 0xf, 8, false) |
| 391 | MUX_CFG(DA830, EMA_A_10, 17, 0, 0xf, 1, false) |
| 392 | MUX_CFG(DA830, EMA_A_11, 17, 4, 0xf, 1, false) |
| 393 | MUX_CFG(DA830, EMA_A_12, 17, 8, 0xf, 1, false) |
| 394 | MUX_CFG(DA830, EMA_BA_1, 17, 12, 0xf, 1, false) |
| 395 | MUX_CFG(DA830, EMA_BA_0, 17, 16, 0xf, 1, false) |
| 396 | MUX_CFG(DA830, EMA_CLK, 17, 20, 0xf, 1, false) |
| 397 | MUX_CFG(DA830, EMA_SDCKE, 17, 24, 0xf, 1, false) |
| 398 | MUX_CFG(DA830, NEMA_CAS, 17, 28, 0xf, 1, false) |
| 399 | MUX_CFG(DA830, LCD_VSYNC, 17, 0, 0xf, 2, false) |
| 400 | MUX_CFG(DA830, NLCD_AC_ENB_CS, 17, 4, 0xf, 2, false) |
| 401 | MUX_CFG(DA830, LCD_MCLK, 17, 8, 0xf, 2, false) |
| 402 | MUX_CFG(DA830, LCD_D_5, 17, 12, 0xf, 2, false) |
| 403 | MUX_CFG(DA830, LCD_D_4, 17, 16, 0xf, 2, false) |
| 404 | MUX_CFG(DA830, OBSCLK, 17, 20, 0xf, 2, false) |
| 405 | MUX_CFG(DA830, NEMA_CS_4, 17, 28, 0xf, 2, false) |
| 406 | MUX_CFG(DA830, UHPI_HHWIL, 17, 12, 0xf, 4, false) |
| 407 | MUX_CFG(DA830, AHCLKR2, 17, 20, 0xf, 4, false) |
| 408 | MUX_CFG(DA830, GPIO1_10, 17, 0, 0xf, 8, false) |
| 409 | MUX_CFG(DA830, GPIO1_11, 17, 4, 0xf, 8, false) |
| 410 | MUX_CFG(DA830, GPIO1_12, 17, 8, 0xf, 8, false) |
| 411 | MUX_CFG(DA830, GPIO1_13, 17, 12, 0xf, 8, false) |
| 412 | MUX_CFG(DA830, GPIO1_14, 17, 16, 0xf, 8, false) |
| 413 | MUX_CFG(DA830, GPIO1_15, 17, 20, 0xf, 8, false) |
| 414 | MUX_CFG(DA830, GPIO2_0, 17, 24, 0xf, 8, false) |
| 415 | MUX_CFG(DA830, GPIO2_1, 17, 28, 0xf, 8, false) |
| 416 | MUX_CFG(DA830, NEMA_RAS, 18, 0, 0xf, 1, false) |
| 417 | MUX_CFG(DA830, NEMA_WE, 18, 4, 0xf, 1, false) |
| 418 | MUX_CFG(DA830, NEMA_CS_0, 18, 8, 0xf, 1, false) |
| 419 | MUX_CFG(DA830, NEMA_CS_2, 18, 12, 0xf, 1, false) |
| 420 | MUX_CFG(DA830, NEMA_CS_3, 18, 16, 0xf, 1, false) |
| 421 | MUX_CFG(DA830, NEMA_OE, 18, 20, 0xf, 1, false) |
| 422 | MUX_CFG(DA830, NEMA_WE_DQM_1, 18, 24, 0xf, 1, false) |
| 423 | MUX_CFG(DA830, NEMA_WE_DQM_0, 18, 28, 0xf, 1, false) |
| 424 | MUX_CFG(DA830, NEMA_CS_5, 18, 0, 0xf, 2, false) |
| 425 | MUX_CFG(DA830, UHPI_HRNW, 18, 4, 0xf, 2, false) |
| 426 | MUX_CFG(DA830, NUHPI_HAS, 18, 8, 0xf, 2, false) |
| 427 | MUX_CFG(DA830, NUHPI_HCS, 18, 12, 0xf, 2, false) |
| 428 | MUX_CFG(DA830, NUHPI_HDS1, 18, 20, 0xf, 2, false) |
| 429 | MUX_CFG(DA830, NUHPI_HDS2, 18, 24, 0xf, 2, false) |
| 430 | MUX_CFG(DA830, NUHPI_HINT, 18, 28, 0xf, 2, false) |
| 431 | MUX_CFG(DA830, AXR0_12, 18, 4, 0xf, 4, false) |
| 432 | MUX_CFG(DA830, AMUTE2, 18, 16, 0xf, 4, false) |
| 433 | MUX_CFG(DA830, AXR0_13, 18, 20, 0xf, 4, false) |
| 434 | MUX_CFG(DA830, AXR0_14, 18, 24, 0xf, 4, false) |
| 435 | MUX_CFG(DA830, AXR0_15, 18, 28, 0xf, 4, false) |
| 436 | MUX_CFG(DA830, GPIO2_2, 18, 0, 0xf, 8, false) |
| 437 | MUX_CFG(DA830, GPIO2_3, 18, 4, 0xf, 8, false) |
| 438 | MUX_CFG(DA830, GPIO2_4, 18, 8, 0xf, 8, false) |
| 439 | MUX_CFG(DA830, GPIO2_5, 18, 12, 0xf, 8, false) |
| 440 | MUX_CFG(DA830, GPIO2_6, 18, 16, 0xf, 8, false) |
| 441 | MUX_CFG(DA830, GPIO2_7, 18, 20, 0xf, 8, false) |
| 442 | MUX_CFG(DA830, GPIO2_8, 18, 24, 0xf, 8, false) |
| 443 | MUX_CFG(DA830, GPIO2_9, 18, 28, 0xf, 8, false) |
| 444 | MUX_CFG(DA830, EMA_WAIT_0, 19, 0, 0xf, 1, false) |
| 445 | MUX_CFG(DA830, NUHPI_HRDY, 19, 0, 0xf, 2, false) |
| 446 | MUX_CFG(DA830, GPIO2_10, 19, 0, 0xf, 8, false) |
| 447 | #endif |
| 448 | }; |
| 449 | |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 450 | static struct map_desc da830_io_desc[] = { |
| 451 | { |
| 452 | .virtual = IO_VIRT, |
| 453 | .pfn = __phys_to_pfn(IO_PHYS), |
| 454 | .length = IO_SIZE, |
| 455 | .type = MT_DEVICE |
| 456 | }, |
| 457 | { |
| 458 | .virtual = DA8XX_CP_INTC_VIRT, |
| 459 | .pfn = __phys_to_pfn(DA8XX_CP_INTC_BASE), |
| 460 | .length = DA8XX_CP_INTC_SIZE, |
| 461 | .type = MT_DEVICE |
| 462 | }, |
| 463 | }; |
| 464 | |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 465 | /* Contents of JTAG ID register used to identify exact cpu type */ |
| 466 | static struct davinci_id da830_ids[] = { |
| 467 | { |
| 468 | .variant = 0x0, |
| 469 | .part_no = 0xb7df, |
| 470 | .manufacturer = 0x017, /* 0x02f >> 1 */ |
| 471 | .cpu_id = DAVINCI_CPU_ID_DA830, |
Kevin Hilman | f2024a99 | 2009-09-29 11:09:21 -0700 | [diff] [blame] | 472 | .name = "da830/omap-l137 rev1.0", |
| 473 | }, |
| 474 | { |
| 475 | .variant = 0x8, |
| 476 | .part_no = 0xb7df, |
| 477 | .manufacturer = 0x017, |
| 478 | .cpu_id = DAVINCI_CPU_ID_DA830, |
| 479 | .name = "da830/omap-l137 rev1.1", |
| 480 | }, |
| 481 | { |
| 482 | .variant = 0x9, |
| 483 | .part_no = 0xb7df, |
| 484 | .manufacturer = 0x017, |
| 485 | .cpu_id = DAVINCI_CPU_ID_DA830, |
| 486 | .name = "da830/omap-l137 rev2.0", |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 487 | }, |
| 488 | }; |
| 489 | |
Bhumika Goyal | ab41910 | 2017-10-16 12:08:24 +0200 | [diff] [blame] | 490 | static const struct davinci_soc_info davinci_soc_info_da830 = { |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 491 | .io_desc = da830_io_desc, |
| 492 | .io_desc_num = ARRAY_SIZE(da830_io_desc), |
Cyril Chemparathy | 3347db8 | 2010-05-07 17:06:34 -0400 | [diff] [blame] | 493 | .jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG, |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 494 | .ids = da830_ids, |
| 495 | .ids_num = ARRAY_SIZE(da830_ids), |
Cyril Chemparathy | 779b0d5 | 2010-05-07 17:06:38 -0400 | [diff] [blame] | 496 | .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 497 | .pinmux_pins = da830_pins, |
| 498 | .pinmux_pins_num = ARRAY_SIZE(da830_pins), |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 499 | }; |
| 500 | |
| 501 | void __init da830_init(void) |
| 502 | { |
Mark A. Greer | 55c79a4 | 2009-06-03 18:36:54 -0700 | [diff] [blame] | 503 | davinci_common_init(&davinci_soc_info_da830); |
Cyril Chemparathy | bcd6a1c | 2010-05-07 17:06:39 -0400 | [diff] [blame] | 504 | |
| 505 | da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); |
| 506 | WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module"); |
David Lechner | 96c0817 | 2018-01-19 21:20:22 -0600 | [diff] [blame] | 507 | } |